IP Library Granted Patent US 10,248,596
Granted Patent B2
US 10,248,596 · App. 15/499,259 · Granted Apr 2, 2019

Systems and methods for providing a lower-latency path in a virtualized software defined storage architecture

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Quick Facts
Patent No.
US 10,248,596
App. No.
15/499,259
Granted
Apr 2, 2019
Kind
B2
Abstract

In accordance with embodiments of the present disclosure, a method may include receiving an input/output command from an application executing on a virtual machine of a hypervisor, wherein the hypervisor executes on a processor subsystem, determining if the input/output command meets a predefined criteria for trapping the input/output command, and responsive to determining that the input/output command meets a predefined criteria for trapping the input/output command, bypassing a storage stack of the hypervisor by passing the input/output command to an endpoint of an accelerator device assigned for access to the hypervisor.

Claims (34)

1. An information handling system, comprising:

an accelerator device; and

a processor subsystem having access to a memory subsystem and having access to the accelerator device, wherein the memory subsystem stores instructions executable by the processor subsystem, the instructions, when executed by the processor subsystem, causing the processor subsystem to:

receive an input/output command from an application executing on a virtual machine of a hypervisor, wherein the hypervisor is executing on the processor subsystem;

determine if the input/output command meets a predefined criteria for trapping the input/output command; and

responsive to determining that the input/output command meets a predefined criteria for trapping the input/output command, bypass a storage stack of the hypervisor by passing the input/output command to an endpoint of the accelerator device assigned for access to the hypervisor.

2. The information handling system of claim 1 , wherein the accelerator device is a Peripheral Component Interconnect Express device.

3. The information handling system of claim 1 , the instructions for further causing the processor subsystem to, responsive to determining that the input/output command does not meet the predefined criteria for trapping the input/output command, pass the input/output command to the storage stack of the hypervisor.

4. The information handling system of claim 1 , wherein the predefined criteria defines at least one of a type of the input/output command, a particular input/output protocol for the input/output command, and a particular string of data associated with the input/output command.

5. The information handling system of claim 1 , wherein the accelerator device is configured to accelerate data transfer operations between the virtual machine and a storage virtual appliance executing as a second virtual machine of the hypervisor and assigned for access to a second endpoint of the accelerator device.

6. The information handling system of claim 1 , wherein passing the input/output command to the endpoint of the accelerator device assigned for access to the hypervisor comprises passing the input/output command to a specialized accelerator device driver interfaced between the endpoint and a filter agent embodied by the instructions.

7. The information handling system of claim 1 , wherein the storage stack of the hypervisor comprises an input/output stack, a virtual file system, and a driver of the hypervisor.

8. A method, comprising:

receiving an input/output command from an application executing on a virtual machine of a hypervisor, wherein the hypervisor executes on a processor subsystem;

determining if the input/output command meets a predefined criteria for trapping the input/output command; and

responsive to determining that the input/output command meets a predefined criteria for trapping the input/output command, bypassing a storage stack of the hypervisor by passing the input/output command to an endpoint of an accelerator device assigned for access to the hypervisor.

9. The method of claim 8 , wherein the accelerator device is a Peripheral Component Interconnect Express device.

10. The method of claim 8 , further comprising responsive to determining that the input/output command does not meet the predefined criteria for trapping the input/output command, passing the input/output command to the storage stack of the hypervisor.

11. The method of claim 8 , wherein the predefined criteria defines at least one of a type of the input/output command, a particular input/output protocol for the input/output command, and a particular string of data associated with the input/output command.

12. The method of claim 8 , wherein the accelerator device is configured to accelerate data transfer operations between the virtual machine and a storage virtual appliance executing as a second virtual machine of the hypervisor and assigned for access to a second endpoint of the accelerator device.

13. The method of claim 8 , wherein passing the input/output command to the endpoint of the accelerator device assigned for access to the hypervisor comprises passing the input/output command to a specialized accelerator device driver interfaced between the endpoint and a filter agent for executing the method.

14. The method of claim 8 , wherein the storage stack of the hypervisor comprises an input/output stack, a virtual file system, and a driver of the hypervisor.

15. An article of manufacture comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to:

receive an input/output command from an application executing on a virtual machine of a hypervisor, wherein the hypervisor executes on a processor subsystem;

determine if the input/output command meets a predefined criteria for trapping the input/output command; and

responsive to determining that the input/output command meets a predefined criteria for trapping the input/output command, bypass a storage stack of the hypervisor by passing the input/output command to an endpoint of an accelerator device assigned for access to the hypervisor.

16. The article of claim 15 , wherein the accelerator device is a Peripheral Component Interconnect Express device.

17. The article of claim 15 , the instructions for further causing the processor to, responsive to determining that the input/output command does not meet the predefined criteria for trapping the input/output command, passing the input/output command to the storage stack of the hypervisor.

18. The article of claim 15 , wherein the predefined criteria defines at least one of a type of the input/output command, a particular input/output protocol for the input/output command, and a particular string of data associated with the input/output command.

19. The article of claim 15 , wherein the accelerator device is configured to accelerate data transfer operations between the virtual machine and a storage virtual appliance executing as a second virtual machine of the hypervisor and assigned for access to a second endpoint of the accelerator device.

20. The article of claim 15 , wherein passing the input/output command to the endpoint of the accelerator device assigned for access to the hypervisor comprises passing the input/output command to a specialized accelerator device driver interfaced between the endpoint and a filter agent for executing the method.

21. The article of claim 15 , wherein the storage stack of the hypervisor comprises an input/output stack, a virtual file system, and a driver of the hypervisor.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (050724/0466) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 060753/0486 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (042769/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0802 →
RELEASE OF SECURITY INTEREST AT REEL 042768 FRAME 0585 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0536 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 15, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 050724/0466 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY INTEREST (CREDIT) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 042768/0585 →
PATENT SECURITY INTEREST (NOTES) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 042769/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2017
From: IYER, SHYAM T.
To: DELL PRODUCTS L.P.
Reel/Frame 042206/0292 →