IP Library Granted Patent US 10,141,927
Granted Patent B2
US 10,141,927 · App. 15/499,770 · Granted Nov 27, 2018

Optimized RF switching device architecture for impedance control applications

Inventors: Tero Tapio Ranta (San Diego, CA); Chih-Chieh Cheng (Poway, CA)
Assignee: pSemi Corporation
H03K17/693H03K17/102H04B1/48H01P5/12Y10T29/49105
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Quick Facts
Patent No.
US 10,141,927
App. No.
15/499,770
Granted
Nov 27, 2018
Kind
B2
Abstract

A switch architecture having open reflective unselected ports. Signals can be selectively coupled between a common port and at least one selectable port through series connected switches. When one or more port is selected, the remaining ports are opened. In addition, associated “shuntable” switches from each of the selectable ports to ground are always open, regardless of the ON or OFF state of the series switches; thus, there is no normally active connection of the selectable ports to ground, but the presence of the shuntable switches provides electrostatic discharge protection for all ports. Embodiments of the invention allow configurability between a traditional architecture and an open reflective unselected port architecture, and include integrated circuit and field effect transistor embodiments.

Claims (54)

1. A switching device having open reflective unselected ports, including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports; and

(b) for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such series switch;

wherein the shuntable switch for at least one selectable port is biased in a first mode of operation to be in a constant open state regardless of the open or closed state of the associated series switch, such that the at least one selectable port is in an open reflective configuration when unselected.

2. The switching device of claim 1 , further including configuration and control circuitry, coupled to each shuntable switch, for selectively alternatively configuring the shuntable switch for at least one selectable port to be in a closed state in a second mode of operation, such that the at least one selectable port is in a short reflective configuration in such alternative configuration when unselected.

3. The switching device of claim 1 , further including a shuntable switch coupled between a node and the common port, wherein such shuntable switch is in an open state.

4. The invention of claim 1 , wherein at least one shuntable switch is conductive with respect to signals above a breakdown voltage threshold of such shuntable switch.

5. The invention of claim 1 , wherein at least one shuntable switch comprises a plurality of series connected field effect transistors.

6. The invention of claim 1 , wherein at least one shuntable switch comprises at least one field effect transistor (FET) having a gate, and wherein, in first mode of operation, a bias voltage is applied to the gate of each such FET so that such FETs are in a permanent OFF state.

7. An integrated circuit die for a switching device having open reflective unselected ports, including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each selected series switch, and decouples the common port from all unselected selectable ports;

(b) for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch; and

(c) a configurable layout wherein at least one shuntable switch is selectively configurable by an interconnect mask to be either (1) configured to be in a constant open state regardless of the open or closed state of the associated series switch, such that at least one selectable port is in an open reflective configuration when unselected, or (2) configured to be selectively switchable to a closed state, such that at least one unselected selectable port is in a short reflective configuration when the at least one shuntable switch is in the closed state.

8. The integrated circuit die of claim 7 , further including a shuntable switch coupled between a node and the common port, wherein such shuntable switch is in an open state.

9. A method for embodying a switching device having open reflective unselected ports as an integrated circuit, including the steps of:

(a) fabricating at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with the selected series switch, and decouples the common port from all unselected selectable ports;

(b) fabricating, for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch; and

(c) configuring the shuntable switch for at least one selectable port to be in a constant open state regardless of the open or closed state of the associated series switch, such that the at least one selectable port is in an open reflective configuration when unselected.

10. The method of claim 9 , further including the step of fabricating a shuntable switch coupled between a node and the common port, wherein such shuntable switch is in an open state.

11. The method of claim 9 , wherein the step of configuring further includes alternatively configuring at least one shuntable switch to be in a closed state in a second mode of operation, such that at least one selectable port is in a short reflective configuration in such alternative configuration when unselected.

12. A switching device having open reflective unselected ports, including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports; and

(b) a shuntable switch coupled to a node and between the common port and the at least one series switch, wherein such shuntable switch is biased to be in a constant open state.

13. The switching device of claim 12 , further including, for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch, wherein the shuntable switch for at least one selectable port is biased in a first mode of operation to be in a constant open state regardless of the open or closed state of the associated series switch, such that the at least one selectable port is in an open reflective configuration when unselected.

14. The switching device of claim 13 , further including configuration and control circuitry, coupled to each shuntable switch, for selectively alternatively configuring the shuntable switch for at least one selectable port to be in a closed state in a second mode of operation, such that the at least one selectable port is in a short reflective configuration in such alternative configuration when unselected.

15. A method for embodying a switching device having open reflective unselected ports as an integrated circuit, including the steps of:

(a) fabricating at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with the selected series switch, and decouples the common port from all unselected selectable ports; and

(b) fabricating a shuntable switch coupled to a node and between the common port and the at least one series switch, wherein such shuntable switch is biased to be in a constant open state.

16. The method of claim 15 , further including the step of fabricating, for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch, wherein the shuntable switch for at least one selectable port is biased in a first mode of operation to be in a constant open state regardless of the open or closed state of the associated series switch, such that the at least one selectable port is in an open reflective configuration when selected.

17. The method of claim 15 , further including alternatively configuring at least one shuntable switch to be in a closed state in a second mode of operation, such that at least one selectable port is in a short reflective configuration in such alternative configuration when unselected.

18. A series tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch, wherein the shuntable switch for at least one selectable port is configured to be biased in a first mode of operation to be in a constant open state such that the at least one selectable port is in an open reflective configuration when unselected; and

(c) a tuning element including one or more impedance elements coupled in series, each impedance element having an input node and an output node, and the tuning element having an input node and an output node, wherein the output node of the tuning element is coupled to the common port, the input node of the tuning element is coupled to a corresponding selectable port, and the input/output nodes between impedance elements within the tuning element are coupled to corresponding selectable ports.

19. A shunt tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch, wherein the shuntable switch for at least one selectable port is configured to be biased in a first mode of operation to be in a constant open state such that the at least one selectable port is in an open reflective configuration when unselected; and

(c) a tuning element including one or more impedance elements coupled in series, each impedance element having an input node and an output node, and the tuning element having an input node and an output node, wherein the common port is coupled to a node, and the input/output nodes between impedance elements within the tuning element are coupled to corresponding selectable ports.

20. A shunt tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) for each series switch, an associated shuntable switch, each shuntable switch being coupled between a node and the selectable port associated with such associated series switch, wherein the shuntable switch for at least one selectable port is configured to be biased in a first mode of operation to be in a constant open state such that the at least one selectable port is in an open reflective configuration when unselected; and

(c) one or more impedance elements, each impedance element having an input node and an output node, wherein the input nodes of each impedance element are coupled to corresponding selectable ports, the output nodes of each impedance element are coupled to a node, and the common port is connectable to an input signal.

21. A series tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) a shuntable switch coupled to a node and between the common port and the at least one series switch, wherein such shuntable switch is biased to be in a constant open state; and

(c) a tuning element including one or more impedance elements coupled in series, each impedance element having an input node and an output node, and the tuning element having an input node and an output node, wherein the output node of the tuning element is coupled to the common port, the input node of the tuning element is coupled to a corresponding selectable port, and the input/output nodes between impedance elements within the tuning element are coupled to corresponding selectable ports.

22. A shunt tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) a shuntable switch coupled to a node and between the common port and the at least one series switch, wherein such shuntable switch is biased to be in a constant open state; and

(c) a tuning element including one or more impedance elements coupled in series, each impedance element having an input node and an output node, and the tuning element having an input node and an output node, wherein the common port is coupled to a node, and the input/output nodes between impedance elements within the tuning element are coupled to corresponding selectable ports.

23. A shunt tuning circuit including:

(a) at least one series switch, each series switch being coupled to a common port and to an associated selectable port such that selection of at least one series switch electrically couples the common port to the selectable port associated with each such selected series switch, and decouples the common port from all unselected selectable ports;

(b) a shuntable switch coupled to a node and between the common port and the at least one series switch, wherein such shuntable switch is biased to be in a constant open state; and

(c) one or more impedance elements, each impedance element having an input node and an output node, wherein the input nodes of each impedance element are coupled to corresponding selectable ports, the output nodes of each impedance element are coupled to a node, and the common port is connectable to an input signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2025
From: RANTA, TERO TAPIO; CHENG, CHIH-CHIEH
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 071021/0676 →
CHANGE OF NAME Recorded Jan 24, 2018
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 045749/0391 →
Continuity (3)
Continuation 14501677 · Sep 30, 2014
Provisional Application 61887224 · Oct 4, 2013
Related Publication 20170302272A1 · Oct 19, 2017