Patterning layers stacks for electronic devices

1. A method of patterning a stack of layers defining one or more electronic device elements, comprising:

creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and

etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level of the stack;

wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion;

wherein creating said first thickness profile comprises stopping the laser ablation midway through a first layer of the uppermost portion;

wherein said etching comprises etching one or more layers below said first layer, and

wherein said laser ablation removes an upper portion of the stack in selected regions;

wherein said etching comprises etching the stack in said selected regions and outside the selected regions to leave an etched surface in said selected regions and outside said selected regions; and

wherein the method further comprises depositing material over the etched surface in said selected regions and outside said selected regions.

2. A method according to claim 1 , wherein said first thickness profile comprises one or more first regions in which said uppermost portion of the stack has a first non-zero thickness, and one or more second regions in which said uppermost portion of the stack has a second non-zero thickness smaller than said first non-zero thickness, and wherein said etching reduces the thickness of said one or more lower layers in said second region without reducing the thickness of said one or more lower layers under in said one or more first regions.

3. A method according to claim 1 , wherein said uppermost portion of the stack consists of one or more upper layers of the stack.

4. A method according to claim 1 , wherein reducing the thickness of said one or more lower layers comprises reducing the thickness of said one or more lower layers to zero.

5. A method according to claim 1 , wherein said first thickness profile comprises one or more first regions in which said uppermost portion of the stack has a first thickness, and one or more second regions in which said uppermost portion of the stack has a second thickness smaller than said first thickness; and the etching reduces the thickness of the stack in said one or more first regions by a first amount, and reduces the thickness of the stack in said one or more second regions by a second amount, wherein said first amount is substantially no less than 10% of said second amount.

6. A method according to claim 1 , wherein the stack of layers includes a layer of semiconductor material providing the semiconductor channels of an array of transistors; and the method comprises stopping the laser ablation at a level above the layer of semiconductor channel material, and wherein etching the stack of layers comprises etching the layer of semiconductor channel material.

7. A method according to claim 1 , wherein the second thickness profile defines holes extending down through one or more non-conductor layers of the stack of layers to a conductor layer of the stack of layers.

8. A method according to claim 1 ,

wherein said first layer comprises a lower layer of two insulating layers; and

wherein creating said first thickness profile comprises laser ablating down through the entire thickness of an upper layer of said two insulating layers, laser ablating down through an upper portion of said lower layer of said two insulating layers, and stopping the laser ablation short of the bottom of said lower layer of said two insulating layers; and said etching comprises etching one or more layers below said lower layer of said two insulating layers.

9. A method according to claim 8 ,

wherein said lower layer of said two insulating layers is directly above a semiconductor layer providing the semiconductor channels for one or more transistors; and said etching comprises etching said semiconductor layer.

10. The method according to claim 1 ,

wherein the stack of layers is formed on a substrate; wherein said laser ablation of the stack of layers is done without ablating the substrate; and

wherein said etching of the stack of layers is done without etching the substrate.

11. The method according to claim 10 , wherein the substrate comprises a flexible plastic support film.

12. The method according to claim 10 , wherein said etching exposes conductors formed on said substrate.

13. A method of patterning a stack of layers defining one or more electronic device elements, comprising:

creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and

etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level of the stack;

wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion;

wherein creating said first thickness profile comprises removing an upper portion of a first layer by laser ablation and stopping said laser ablation short of the bottom of said first layer;

wherein said etching comprises etching one or more layers below said first layer, and

wherein said laser ablation removes an upper portion of the stack in selected regions;

wherein said etching comprises etching the stack in said selected regions and outside the selected regions to leave an etched surface in said selected regions and outside said selected regions; and

wherein the method further comprises depositing material over the etched surface in said selected regions and outside said selected regions.

14. The method according to claim 13 , wherein the stack of layers is formed on a substrate; wherein said laser ablation of the stack of layers is done without ablating the substrate; and wherein said etching of the stack of layers is done without etching the substrate.

15. The method according to claim 14 , wherein said etching exposes conductors formed on said substrate.

16. A method of patterning a stack of layers defining one or more electronic device elements, comprising:

creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level of the stack;

wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion;

wherein said first thickness profile extends partially down through a dielectric layer of the stack directly above a semiconductor layer of the stack;

wherein said etching comprises etching said semiconductor layer, and

wherein said laser ablation removes an upper portion of the stack in selected regions;

wherein said etching comprises etching the stack in said selected regions and outside the selected regions to leave an etched surface in said selected regions and outside said selected regions; and

wherein the method further comprises depositing material over the etched surface in said selected regions and outside said selected regions.

17. The method according to claim 16 , wherein the stack of layers is formed on a substrate; wherein said laser ablation of the stack of layers is done without ablating the substrate; and wherein said etching of the stack of layers is done without etching the substrate.