IP Library Granted Patent US 10,224,457
Granted Patent B2
US 10,224,457 · App. 15/524,206 · Granted Mar 5, 2019

Light emitting device with trench beneath a top contact

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Quick Facts
Patent No.
US 10,224,457
App. No.
15/524,206
Granted
Mar 5, 2019
Kind
B2
Abstract

Embodiments of the invention are directed to structures in a vertical light emitting device that prevent light from being generated beneath absorbing structures, and/or direct light away from absorbing structures. Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A bottom contact is disposed on a bottom surface of the semiconductor structure. The bottom contact is electrically connected to one of the n-type region and the p-type region. A top contact is disposed on a top surface of the semiconductor structure. The top contact is electrically connected to the other of the n-type region and the p-type region. The top contact includes a first side and a second side opposite the first side. A first trench is formed in the semiconductor structure beneath the first side of the top contact. A second trench is formed in the seminconductor structure beneath the second side of the top contact.

Claims (39)

1. A device comprising:

a semiconductor structure comprising a light emitting layer disposed between an upper region having a first conductivity and a lower region having a second conductivity opposite the first conductivity;

a top contact disposed on a top surface of the semiconductor structure, the top contact being electrically connected to the upper region;

a mount:

a trench formed in a bottom surface of the semiconductor structure beneath the top contact, the trench extending from the bottom surface without penetrating the light emitting layer, the trench creating a thermal conduction path from an n-contact arm to the mount, and comprising a first sidewall extending from a top of the trench to a bottom of the trench such that the entire first sidewall is angled less than 90° relative to a normal to the top surface of the semiconductor structure;

a reflective layer disposed over the bottom surface and in the trench, the reflective layer in the trench forming at least part of a mirror that reflects light away from the top contact; and

a filler material disposed in a void where the reflective layer does not completely fill the trench.

2. The device of claim 1 wherein the trench is aligned with and disposed beneath the top contact and at least a portion of the trench is substantially the same width as the top contact overlying the trench.

3. The device of claim 1 wherein the light emitting layer is a III-nitride material.

4. The device of claim 1 wherein the light emitting layer is AllnGaP.

5. The device of claim 1 further comprising a dielectric layer lining the bottom surface and the trench, the dielectric layer in the trench forming part of the mirror that reflects light away from the top contact, the reflective layer being disposed on the dielectric layer over the bottom surface and in the trench, the reflective layer being electrically isolated from the semiconductor structure by the dielectric layer.

6. The device of claim 5 further comprising contact metals in the dielectric layer to electrically contact the bottom surface, the reflective layer being electrically conductive and in electrical contact with the contact metals.

7. The device of claim 1 wherein the first sidewall is angled 30° to 90° relative to a normal to the top surface of the semiconductor structure.

8. The device of claim 1 wherein:

The upper region is an n-type region;

the top contact is electrically connected to the n-type region;

the lower region is a p-type region; and

a deepest point of the trench is disposed in the p-type region.

9. The device of claim 1 wherein:

the upper region is a p-type region;

the top contact is electrically connected to the p-type region;

the lower region is an n-type region; and

a deepest point of the trench is disposed in the n-type region.

10. A device comprising:

a semiconductor structure comprising a light emitting layer disposed between an upper region having a first conductivity and a lower region having a second conductivity opposite the first conductivity;

a top contact disposed on a top surface of the semiconductor structure, the top contact being electrically connected to the upper region, the top contact comprising a first edge and a second edge opposite the first edge;

first trench formed in a bottom surface of the semiconductor structure beneath the first edge of the top contact;

second trench formed in the bottom surface of the semiconductor structure beneath the second edge of the top contact;

a mount:

the first trench and the second trench creating a thermal conduction path from an n-contact arm to the mount; and

a dielectric layer lining the bottom surface, the first trench, and the second trench, the dielectric layer in the first trench and the second trench forming at least part of mirrors that reflect light away from the top contact.

11. The device of claim 10 further comprising a reflective layer disposed on the dielectric layer over the bottom surface and in the first trench and the second trench, the reflective layer in the first trench and second trench forming part of the mirrors that reflect light away from the top contact, the reflective layer being electrically isolated from the semiconductor structure by the dielectric layer.

12. The device of claim 11 further comprising contact metals in the dielectric layer to electrically contact the bottom surface, the reflective material being electrically conductive and in electrical contact with the contact metals.

13. The device of claim 10 wherein:

the upper region is an n-type region; and

first trench and the second trench each extend from the bottom surface and a deepest point of each of the first and second trenches is within the n-type region.

14. The device of claim 10 wherein the light emitting layer is a III-nitride material.

15. The device of claim 10 wherein at least one sidewall of each of the first and second trenches is angled 30° to 90° relative to a normal to the top surface of the semiconductor structure.

16. The device of claim 10 further comprising a filler material disposed in voids where the reflective layer does not completely fill the first trench and the second trench.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2025
From: LUMILEDS LLC
To: LUMILEDS SINGAPORE PTE. LTD.
Reel/Frame 071888/0086 →
RELEASE OF SECURITY INTEREST Recorded Jan 29, 2025
From: SOUND POINT AGENCY LLC
To: LUMILEDS LLC; LUMILEDS HOLDING B.V.
Reel/Frame 070046/0001 →
SECURITY INTEREST Recorded Jan 5, 2023
From: LUMILEDS LLC; LUMILEDS HOLDING B.V.
To: SOUND POINT AGENCY LLC
Reel/Frame 062299/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2018
From: KONINKLIJKE PHILIPS N.V.
To: LUMILEDS LLC
Reel/Frame 045859/0005 →
SECURITY INTEREST Recorded Jul 7, 2017
From: LUMILEDS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 043108/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2017
From: KHARAS, BORIS
To: KONINKLIJKE PHILIPS N.V.
Reel/Frame 042262/0668 →