IP Library Granted Patent US 10,290,997
Granted Patent B2
US 10,290,997 · App. 15/550,888 · Granted May 14, 2019

Method of producing an electronic component

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Quick Facts
Patent No.
US 10,290,997
App. No.
15/550,888
Granted
May 14, 2019
Kind
B2
Abstract

A method of producing an electronic component includes providing a surface comprising a first region and a second region adjoining the first region, arranging a sacrificial layer above the first region of the surface, arranging a passivation layer above the sacrificial layer and the second region of the surface, creating an opening in the passivation layer above the first region of the surface, wherein the opening in the passivation layer is created with an opening area that is smaller than the first region, and removing the sacrificial layer and the portions of the passivation layer that are arranged above the first region.

Claims (26)

1. A method of producing an electronic component comprising:

providing a surface comprising a first region and a second region adjoining the first region;

arranging a sacrificial layer above the first region of the surface, but not above the second region of the surface;

arranging a passivation layer above the sacrificial layer and the second region of the surface;

creating an opening in the passivation layer above of the surface and within the first region, wherein the opening in the passivation layer is created with an opening area that is smaller than the first region; and

removing the sacrificial layer and the portions of the passivation layer that are arranged above the first region.

2. The method according to claim 1 , wherein creating the opening in the passivation layer comprises:

arranging a photoresist layer above the passivation layer;

creating an opening in the photoresist layer above the first region of the surface;

removing a part of the passivation layer that is arranged below the opening in the photoresist layer; and

removing the photoresist.

3. The method according to claim 1 , wherein, before arranging the sacrificial layer, an electrically conductive layer is arranged above the first region of the surface or above the first region and the second region of the surface.

4. The method according to claim 1 , wherein, before arranging the passivation layer, a part of the surface is removed in the second region.

5. The method according to claim 1 , wherein the surface is a surface of a semiconductor body.

6. The method according to claim 4 , wherein the electronic component is a laser component and a waveguide structure of the laser component is formed in the first region of the surface.

7. The method according to claim 1 , wherein, before arranging the passivation layer, a cover layer is arranged above the sacrificial layer, and after creating the opening in the passivation layer, a part of the cover layer arranged below the opening in the passivation layer is also removed.

8. The method according to claim 7 , wherein, before arranging the passivation layer, a part of the sacrificial layer is removed.

9. The method according to claim 7 , wherein the cover layer is created from a material comprising SiO, SiN, TiWN, a photoresist or a metal.

10. The method according to claim 1 , wherein the sacrificial layer is also arranged above a third region of the surface, said third region being spaced apart from the first region, the passivation layer is also arranged above the third region of the surface, and above the third region of the surface, no opening is created in the passivation layer.

11. The method according to claim 1 , wherein the sacrificial layer is created from a material comprising ZnO, Al 2 O 3 , TiWN, SiO or a photoresist.

12. The method according to claim 1 , wherein the sacrificial layer is created with a thickness of 10 nm to 1 μm.

13. The method according to claim 1 , wherein the passivation layer is created by chemical vapor deposition or atomic layer deposition.

14. The method according to claim 1 , wherein the passivation layer is created from a material comprising SiN, SiO, TaO, ZrO, AlO or ITO.

15. The method according to claim 1 , wherein the passivation layer is created with a thickness of 1 nm to 1 μm.

16. The method according to claim 2 , wherein removing part of the passivation layer is carried out by dry-chemical etching using fluorine, chlorine or argon.

17. The method according to claim 1 , wherein removing the sacrificial layer is carried out by wet-chemical etching using HCl or KOH.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2017
From: MUELLER, JENS; STEPHAN, CHRISTOPH; WALTER, ROBERT; HARTAUER, STEFAN; RUMBOLZ, CHRISTIAN
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 043612/0929 →