IP Library Granted Patent US 10,320,367
Granted Patent B2
US 10,320,367 · App. 15/568,711 · Granted Jun 11, 2019

Method for synchronizing commutated control circuits controlled by PWM control signals

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Quick Facts
Patent No.
US 10,320,367
App. No.
15/568,711
Granted
Jun 11, 2019
Kind
B2
Abstract

Disclosed is a method for synchronising at least one slave control circuit, controlled by a slave control signal having pulse width modulation, with a master control circuit, controlled by a master control signal having pulse width modulation, including the following steps: the master control circuit emitting a synchronisation signal indicating a master edge of an electrical quantity; the slave control circuit receiving the synchronisation signal; measuring a delay between a slave edge of the same electrical quantity and the master edge of the electrical quantity; time-shifting the slave control signal so as to reduce the delay; and repeating the measurement step until the delay is eliminated.

Claims (31)

1. A method for synchronizing at least one slave control circuit ( 1 S), of switched type, controlled by a slave control signal ( 2 S) having pulse width modulation exhibiting a slave period ( 3 S) and controlling a slave load ( 4 S), with a master control circuit ( 1 M), of switched type, controlled by a master control signal ( 2 M) having pulse width modulation exhibiting a master period ( 3 M) and controlling a master load ( 4 M), the method comprising the following steps:

the master control circuit ( 1 M) transmitting a synchronization signal ( 5 ) that is indicative of a master edge ( 67 M, 68 M) of an electrical quantity ( 7 M, 8 M) of the master circuit ( 1 M);

the slave control circuit ( 1 S) receiving the synchronization signal ( 5 );

repeatedly measuring an interval ( 9 SM) between a slave edge ( 67 S, 68 S) of the same electrical quantity ( 7 S, 8 S) of the slave circuit ( 1 S) and the master edge ( 67 M, 68 M) of the electrical quantity ( 7 M, 8 M) of the master circuit ( 1 M) as indicated by the synchronization signal ( 5 ), and time-shifting ( 92 E, 92 T) the slave control signal ( 2 S) in a manner that decreases the measured interval ( 9 SM), until said interval ( 9 SM) is canceled out,

wherein the direction of the master edge ( 67 M, 68 M) and the direction of the one or more slave edges ( 67 S, 68 S) of the measurement step are opposite.

2. The method as claimed in claim 1 , further comprising:

prior to the measurement step, initially delaying the master control signal ( 2 M) so as to create a synchronization margin ( 13 ).

3. The method as claimed in claim 1 , wherein the slave period ( 3 S) is equal to the master period ( 3 M).

4. The method as claimed in claim 1 , wherein the electrical quantity ( 7 , 8 ) is the current ( 7 ) flowing through the control circuit.

5. The method as claimed in claim 1 , wherein the electrical quantity ( 7 , 8 ) is the voltage ( 8 ) across the terminals of the load ( 4 ).

6. The method as claimed in claim 1 , wherein the master edge ( 67 M, 68 M) and the one or more slave edges ( 67 S, 68 S) of the measurement step are chosen from among periodic edges.

7. The method as claimed in claim 1 , further comprising:

configuring the master control signal ( 2 M) according to a first logic, with a choice of a high level ( 11 M) at the start of a period ( 3 M) or a high level ( 11 M) at the end of a period ( 3 M); and

configuring the one or more slave control signals ( 2 S) according to a second logic, different from the first logic.

8. The method as claimed in claim 1 , wherein the master load ( 4 M) is at least inductive.

9. The method as claimed in claim 1 , wherein the one or more slave loads ( 4 S) are at least inductive.

10. An electronic component for synchronizing at least one slave control circuit ( 1 S), of switched type, controlled by a slave control signal ( 2 S) having pulse width modulation exhibiting a slave period ( 3 S) and controlling a slave load ( 4 S), with a master control circuit ( 1 M), of switched type, controlled by a master control signal ( 2 M) having pulse width modulation exhibiting a master period ( 3 M) and controlling a master load ( 4 M), implementing the method as claimed in claim 1 , comprising:

means for the master control circuit ( 1 M) to transmit a synchronization signal ( 5 ) that is indicative of a master edge ( 67 M, 68 M) of an electrical quantity ( 7 M, 8 M) of the master circuit ( 1 M);

means for the slave control circuit ( 1 S) to receive the synchronization signal ( 5 );

means for measuring an interval ( 9 SM) between a slave edge ( 67 S, 68 S) of the same electrical quantity ( 7 S, 8 S) of the slave circuit ( 1 S) and the master edge ( 67 M, 68 M) of the electrical quantity ( 7 M, 8 M) of the master circuit ( 1 M) as indicated by the synchronization signal ( 5 );

means for time-shifting ( 92 E, 92 T) the slave control signal ( 2 S) so as to decrease said interval ( 9 SM).

11. The electronic component as claimed in claim 10 , further comprising:

at least one master control circuit ( 1 M) and at least one slave control circuit ( 1 S), positioned within one and the same housing.

12. The method as claimed in claim 2 , wherein the slave period ( 3 S) is equal to the master period ( 3 M).

13. The method as claimed in claim 2 , wherein the electrical quantity ( 7 , 8 ) is the current ( 7 ) flowing through the control circuit.

14. The method as claimed in claim 3 , wherein the electrical quantity ( 7 , 8 ) is the current ( 7 ) flowing through the control circuit.

15. The method as claimed in claim 2 , wherein the electrical quantity ( 7 , 8 ) is the voltage ( 8 ) across the terminals of the load ( 4 ).

16. The method as claimed in claim 3 , wherein the electrical quantity ( 7 , 8 ) is the voltage ( 8 ) across the terminals of the load ( 4 ).

17. The method as claimed in claim 2 , wherein the master edge ( 67 M, 68 M) and the one or more slave edges ( 67 S, 68 S) of the measurement step are chosen from among periodic edges.

18. The method as claimed in claim 3 , wherein the master edge ( 67 M, 68 M) and the one or more slave edges ( 67 S, 68 S) of the measurement step are chosen from among periodic edges.

19. The method as claimed in claim 4 , wherein the master edge ( 67 M, 68 M) and the one or more slave edges ( 67 S, 68 S) of the measurement step are chosen from among periodic edges.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 24, 2023
From: CONTINENTAL AUTOMOTIVE GMBH; VITESCO TECHNOLOGIES GMBH
To: VITESCO TECHNOLOGIES GMBH
Reel/Frame 063425/0149 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2023
From: CONTINENTAL AUTOMOTIVE FRANCE S.A.S.; CONTINENTAL AUTOMOTIVE GMBH
To: VITESCO TECHNOLOGIES GMBH; CONTINENTAL AUTOMOTIVE GMBH
Reel/Frame 062492/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2017
From: PASQUALETTO, ANGELO
To: CONTINENTAL AUTOMOTIVE FRANCE; CONTINENTAL AUTOMOTIVE GMBH
Reel/Frame 044275/0518 →