Control of semiconductor switch
Arrangement for controlling a voltage signal between gate and emitter terminals (G-E) of a switch type power semiconductor component, such as an IGBT transistor, such that the voltage signal is formed at least partly by means of a resistance and a switch (R GON1 -S GON1 , R GOFF1 -S GOFF1 ) connected in series between an auxiliary voltage (+U G4 , −U G4 ) of a gate controller and the gate terminal (G) of the IGBT. The arrangement is adapted to control the switch (S GON1 , S GOFF1 ) with a high frequency of at least 1 MHz and with a duty cycle adjusted such that the measured rate of change of a collector voltage of the IGBT being controlled is set in accordance with a reference value received from a control unit of the device.
1. An arrangement for controlling, by means of a voltage signal inputted between gate and emitter terminals (G-E), a switch type power semiconductor component in the form of an IGBT transistor, the arrangement comprising:
at least one resistance and at least one switch (R GON1 -S GON1 , R GOFF1 -S GOFF1 ) connected in series between an auxiliary voltage (+U G4 , −U G4 ) of a gate controller and the gate terminal (G) of the IGBT;
a measuring circuit, adapted to measure a collector voltage between collector and emitter terminals of the IGBT and to form therefrom a signal (du C4 /dt) proportional to a rate of change of the collector voltage; and
a signal modification circuit, adapted to control the at least one switch (S GON1 , S GOFF1 ) connected in series with the at least one resistance with a high frequency of at least 1 MHz, by means of the rate of change (du C4 /dt) of the collector voltage influencing the duty cycles of control signals (PWM ON , PWM OFF , PWM ON21 , PWM ON22 ) of the at least one switch;
wherein the at least one switch (S GON1 , S GOFF1 ) and the at least one resistance (R GOFF1 , R GON1 ) connected in series therewith are connected in parallel with a gate resistance that is connected between the IGBT's gate terminal and the auxiliary voltage of the gate controller all the time that the IGBT is controlled to be in a conducting state and all the time that the IGBT is controlled to be in a non-conducting state.
2. The arrangement according to claim 1 , wherein the arrangement further comprises a regulating unit adapted to adjust a duty cycle of a control signal of the at least one switch (S GON1 , S GOFF1 ) such that the measured rate of change of the collector voltage of the IGBT being controlled is set in accordance with a reference value received from a control unit.
3. The arrangement according to claim 1 , wherein the arrangement is adapted to adjust, by means of a duty cycle of a control signal (PWM ON , PWM OFF , PWM ON21 , PWM ON22 ) of the at least one switch (S GON1 , S GOFF1 ), the effective value of the gate resistance substantially steplessly to be greater than an ohm value of the at least one resistance (R GON1 , R GOFF1 ).
4. The arrangement according to claim 1 , wherein the arrangement further comprises second switches (S GON2 , S GOFF2 ) and second resistances (R GON2 , R GOFF2 ) connected in series.
5. The arrangement according to claim 4 , wherein the at least one switch (S GON1 , S GOFF1 ) and the at least one resistance (R GON1 , R GOFF1 ) connected in series are connected in parallel with the second resistances (R GON2 , R GOFF2 ).
6. The arrangement according to claim 4 , wherein the at least one switch (S GON1 , S GOFF1 ) and the at least one resistance (R GON1 , R GOFF1 ) connected in series are connected in parallel with series connections formed by the second switches (S GON2 , S GOFF2 ) and second resistances (R GON2 , R GOFF2 ).
7. The arrangement according to claim 4 , wherein the arrangement is adapted to adjust, by means of duty cycles of control signals (PWM ON , PWM OFF , PWM ON21 , PWM ON22 ) of the at least one switch (S GON1 , S GOFF1 ), the effective value of the gate resistance substantially steplessly between the ohm values of parallel-connected resistances and one resistance.
8. The arrangement according to claim 2 , wherein the arrangement is adapted to adjust, by means of a duty cycle of a control signal (PWM ON , PWM OFF , PWM ON21 , PWM ON22 ) of the at least one switch (S GON1 , S GOFF1 ), the effective value of the gate resistance substantially steplessly to be greater than an ohm value of the at least one resistance (R GON1 , R GOFF1 ).