Multi-chip module package compact thermal models
The current subject matter provides for the generation of network models for multi-chip module packages that are a combination of compact models for each chip within such packages. In some variations, a combination of single chip extraction methods and a linear superposition technique can be used to predict junction temperatures of MCM packages. Related methods, systems, apparatus, and articles are also described.
1. A method for implementation by one or more data processors forming part of at least one computing device, the method comprising:
receiving data characterizing an integrated circuit (IC) package;
identifying functional chips in the IC package;
individually activating each identified functional chip in the IC package by selectively powering each identified functional chip and switching off all other chips;
extracting, based on the activating, a thermal resistance network for each identified functional chip, each network comprising a junction node representing a corresponding chip and a face node representing a heat transfer connection from the junction node to an outside environment of the IC package;
combining the extracted thermal resistance networks to provide a single thermal resistance network with junction nodes and face nodes of the identified functional chips; and
providing data comprising at least a portion of the single thermal resistance network.
2. The method of claim 1 , wherein the providing data comprises at least one of: displaying at least a portion of the provided data in an electronic visual display, storing at least a portion of the provided data in a physical electronic storage medium, loading at least a portion of the provided data into memory, or transmitting at least a portion of the provided data to a remote computing system.
3. The method of claim 1 , wherein the thermal resistance networks are extracted and constructed using the DELPHI methodology.
4. The method of claim 1 , wherein the combining uses linear time-invariant (LTI) system theory to combine the extracted thermal resistance networks.
5. The method of claim 1 , wherein the combining uses linear superposition to combine the extracted thermal resistance networks.
6. The method of claim 1 , wherein the combining uses a series approach for calculating thermal resistance between two face nodes.
7. The method of claim 1 , wherein the combining uses a parallel resistance approach for calculating thermal resistance between internal nodes and face nodes.
8. The method of claim 1 further comprising:
initiating, using the provided data, a thermal simulation of the IC package using a heat transfer and fluid flow analysis software application.
9. A system comprising:
at least one data processor; and
memory storing instructions which, when executed by the at least one data processor, result in operations comprising:
receiving data characterizing an integrated circuit (IC) package;
identifying functional chips in the IC package;
individually activating each identified functional chip in the IC package by selectively powering each identified functional chip and switching off all other identified functional chips;
extracting, based on the activating, a thermal resistance network for each identified functional chip, each network comprising a junction node representing a corresponding chip and a face node representing a heat transfer connection from the junction node to the outside environment of the IC package;
combining extracted thermal resistance networks to provide a single thermal resistance network with junction nodes and face nodes of the identified functional chips; and
providing data comprising at least a portion of the single thermal resistance network.
10. The system of claim 9 , wherein the providing data comprises at least one of: displaying at least a portion of the provided data in an electronic visual display, storing at least a portion of the provided data in a physical electronic storage medium, loading at least a portion of the provided data into memory, or transmitting at least a portion of the provided data to a remote computing system.
11. The system of claim 9 , wherein the thermal resistance networks are extracted and constructed using the DELPHI methodology.
12. The system of claim 9 , wherein the combining uses linear time-invariant (LTI) system theory to combine the extracted thermal resistance networks.
13. The system of claim 9 , wherein the combining uses linear superposition to combine the compact thermal resistance networks.
14. The system of claim 9 , wherein the combining uses a series approach for calculating thermal resistance between two face nodes.
15. The system of claim 9 , wherein the combining uses a parallel resistance approach for calculating thermal resistance between internal nodes and face nodes.
16. The system of claim 9 , wherein the operations further comprise:
initiating, using the provided data, a thermal simulation of the IC package using a heat transfer and fluid flow analysis software application.
17. A non-transitory computer program product storing instructions, which when executed by at least one data processor forming part of at least one computing device, result in operations comprising:
receiving data characterizing an integrated circuit (IC) package;
identifying functional chips in the IC package;
individually activating each identified functional chip in the IC package by selectively powering each identified functional chip and switching off all other identified functional chips;
extracting, based on the activating, a thermal resistance network for each identified functional chip, each network comprising a junction node representing a corresponding chip and a face node representing a heat transfer connection from the junction node to the outside environment of the IC package;
combining extracted thermal resistance networks to provide a single thermal resistance network with junction nodes and face nodes of the identified functional chips; and
providing data comprising at least a portion of the single thermal resistance network.
18. The computer program product of claim 17 , wherein the providing data comprises at least one of: displaying at least a portion of the provided data in an electronic visual display, storing at least a portion of the provided data in a physical electronic storage medium, loading at least a portion of the provided data into memory, or transmitting at least a portion of the provided data to a remote computing system.
19. The computer program product of claim 17 , wherein the thermal resistance networks are extracted and constructed using the DELPHI methodology.
20. The computer program product of claim 17 , wherein the combining uses linear time-invariant (LTI) system theory to combine the extracted thermal resistance networks.
21. The computer program product of claim 17 , wherein the combining uses linear superposition to combine the extracted thermal resistance networks.
22. The computer program product of claim 17 , wherein the combining uses a series approach for calculating thermal resistance between two face nodes.
23. The computer program product of claim 17 , wherein the combining uses a parallel resistance approach for calculating thermal resistance between internal nodes and face nodes.
24. The computer program product of claim 17 , wherein the operations further comprise:
initiating, using the provided data, a thermal simulation of the IC package using a heat transfer and fluid flow analysis software application.