IP Library Granted Patent US 11,049,777
Granted Patent B2
US 11,049,777 · App. 15/581,354 · Granted Jun 29, 2021

Ceramic combo lid with selective and edge metallizations

Inventor: Ramesh Kothandapani (Singapore, SG)
Assignee: MATERION CORPORATION
H01L23/06B23K1/0016B23K1/20B23K31/02B32B15/01C23C14/165C23C14/34H01L21/4803H01L21/4817H01L21/50H01L23/04H01L23/08H01L23/10H01L2924/16195
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Quick Facts
Patent No.
US 11,049,777
App. No.
15/581,354
Granted
Jun 29, 2021
Kind
B2
Abstract

A frame lid for use with a semiconductor package is disclosed. First, a mask is applied to a top surface of the lid and over a central area of the top surface to define a peripheral area. Next, a seal ring is formed by metallizing the peripheral area and the sidewall of the plate. The mask can then be removed obtain the frame lid. Next, a solder preform can be attached to the seal ring. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times.

Claims (7)

1. A frame lid for a semiconductor package comprising:

a substrate comprising a top surface, a bottom surface, and a sidewall joining the top surface and the bottom surface together, wherein the substrate is glass or ceramic; and

at least one layer of metal is applied continuously from a peripheral area of the top surface and extending along the sidewall to the bottom surface of the substrate via sputter deposition, wherein a nickel sublayer is applied continuously from the peripheral area and extending along the sidewall to the bottom surface of the substrate via sputter deposition; and, a gold sublayer is applied via sputter deposition over the nickel sublayer.

2. The frame lid for a semiconductor package of claim 1 , wherein the layer of metal applied to the peripheral area and the sidewall of the substrate via sputter deposition has a thickness of about 1 micrometer to about 10 micrometers.

3. The frame lid for a semiconductor package of claim 1 , wherein the metal applied to the peripheral area and the sidewall of the substrate via sputter deposition has a thickness of about 1 micrometer to about 40 micrometers.

4. The frame lid for a semiconductor package of claim 1 , wherein there are three layers of metal applied to the peripheral area and the sidewall of the substrate via sputter deposition.

5. The frame lid of claim 1 , wherein the ceramic is selected from the group consisting of alumina (Al 2 O 3 ), beryllia (BeO), aluminum nitride (AlN), zirconia toughened alumina (ZTA), SiC, and Si 3 N 4 .

Assignments (2)
SECURITY INTEREST Recorded Sep 25, 2019
From: MATERION CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050493/0809 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2017
From: KOTHANDAPANI, RAMESH
To: MATERION CORPORATION
Reel/Frame 042177/0081 →
Continuity (3)
Division 14718154 · May 21, 2015
Provisional Application 62001166 · May 21, 2014
Related Publication 20170229360A1 · Aug 10, 2017
Cited By (1)
US 1,134,249