IP Library Granted Patent US 10,140,161
Granted Patent B1
US 10,140,161 · App. 15/582,239 · Granted Nov 27, 2018

Workload aware dynamic CPU processor core allocation

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Quick Facts
Patent No.
US 10,140,161
App. No.
15/582,239
Granted
Nov 27, 2018
Kind
B1
Abstract

A method of workload aware dynamic CPU processor core allocation includes the steps of predicting estimated individual workloads for each emulation in a set of emulations for each decision period of a set of decision periods over a predictive time span. The method includes using, by a Mixed Integer Programming (MIP) engine, the predicted estimated individual workloads for each emulation in the set of emulations, a set of constraints, and an optimization function, to determine sets of CPU processor cores to be allocated to each emulation during each decision period over the predictive time span. The method further includes dynamically allocating, by the host computer system, the sets of CPU processor cores to each emulation during each decision period over the predictive time span based on the output from the MIP engine.

Claims (54)

1. A non-transitory tangible computer-readable storage medium having stored thereon a computer program for implementing a method of workload aware dynamic CPU processor core allocation in a host computer system, the computer program including a set of instructions which, when executed by a computer, cause the computer to perform a method comprising the steps of:

predicting estimated individual workloads for each emulation in a set of emulations for each decision period of a set of decision periods over a predictive time span;

using, by a Mixed Integer Programming (MIP) engine, the predicted estimated individual workloads for each emulation in the set of emulations, a set of constraints, and an optimization function, to determine sets of CPU processor cores to be allocated to each emulation during each decision period over the predictive time span; and

dynamically allocating, by the host computer system, the sets of CPU processor cores to each emulation during each decision period over the predictive time span based on an output from the MIP engine;

wherein when the CPU processor cores of the host computer system are homogeneous, the set of constraints comprises:

a first constraint specifying that for all decision periods, the sum of the number of CPU processor cores assigned to all of the emulations is equal to a total number of CPU processor cores in the host computer system; and

a second constraint specifying that for all decision periods, the normalized workload of each emulation, during the decision period, is less than the amount of collective processing capacity of the set of CPU processor cores allocated to that emulation.

2. The non-transitory tangible computer-readable storage medium of claim 1 , wherein the step of predicting estimated individual workloads for each emulation comprises using a statistical model of each emulation's past workload history to predict the future workload levels of the emulations during the set of decision periods.

3. The non-transitory tangible computer-readable storage medium of claim 1 , wherein the step of predicting estimated individual workloads for each emulation comprises using a machine learning regression algorithm or a neural network model to predict the future workload levels of the emulations during the set of decision periods.

4. The non-transitory tangible computer-readable storage medium of claim 1 , wherein when the CPU processor cores of the host computer system are homogeneous, the optimization function comprises:

a first optimization feature to maximize the minimum spare capacity allocated to each emulation over the predictive time span to provide enhanced fault tolerance in the event of sudden workload changes; and

a second optimization feature to minimize a number of CPU processor core reassignments between emulations between subsequent decision periods.

5. The non-transitory tangible computer-readable storage medium of claim 1 , further comprising instructions which, when executed by the computer, cause the computer to further perform a method step of determining actual workload for each emulation during each decision period and using the actual workload to calculate updated estimated individual workloads for each emulation for subsequent decision periods of the predictive time span.

6. A non-transitory tangible computer-readable storage medium, having stored thereon a computer program for implementing a method of workload aware dynamic CPU processor core allocation in a host computer system, the computer program including a set of instructions which, when executed by a computer, cause the computer to perform a method comprising the steps of:

predicting estimated individual workloads for each emulation in a set of emulations for each decision period of a set of decision periods over a predictive time span;

using, by a Mixed Integer Programming (MIP) engine, the predicted estimated individual workloads for each emulation in the set of emulations, a set of constraints, and an optimization function, to determine sets of CPU processor cores to be allocated to each emulation during each decision period over the predictive time span; and

dynamically allocating, by the host computer system, the sets of CPU processor cores to each emulation during each decision period over the predictive time span based on an output from the MIP engine;

wherein when the CPU processor cores of the host computer system are heterogeneous, the set of constraints comprises:

a first constraint specifying that for all decision periods, the sum of the number of CPU processor cores assigned to the set of emulations is equal to the total number of CPU processor cores in the host computer system;

a second constraint specifying that for all decision periods, each CPU processor core is assigned to exactly one emulation and that no CPU processor core is unassigned; and

a third constraint specifying that for all decision periods, and for all emulations, the sum of the capacity of the CPU processor cores assigned to any given emulation will be greater than or equal to the normalized predicted workload of the given emulation during the decision period.

7. The non-transitory tangible computer-readable storage medium of claim 6 , wherein when the CPU processor cores of the host computer system are heterogeneous, the optimization function comprises an optimization feature to minimize a number of CPU processor core reassignments between emulations between subsequent decision periods.

8. The non-transitory tangible computer-readable storage medium of claim 6 , wherein the step of predicting estimated individual workloads for each emulation comprises using a statistical model of each emulation's past workload history to predict the future workload levels of the emulations during the set of decision periods.

9. The non-transitory tangible computer-readable storage medium of claim 6 , wherein the step of predicting estimated individual workloads for each emulation comprises using a machine learning regression algorithm or a neural network model to predict the future workload levels of the emulations during the set of decision periods.

10. The non-transitory tangible computer-readable storage medium of claim 6 , further comprising instructions which, when executed by the computer, cause the computer to further perform a method step of determining actual workload for each emulation during each decision period and using the actual workload to calculate updated estimated individual workloads for each emulation for subsequent decision periods of the predictive time span.

11. A host computer system, comprising:

a set of CPU processor cores;

a set of emulations using physical resources provided by the set of CPU processor cores;

a workload predictor to generate estimated individual workloads for each emulation in a set of emulations for each decision period of a set of decision periods over a predictive time span;

a Mixed Integer Programming (MIP) engine to determine sets of CPU processor cores to be allocated to each emulation during each decision period over the predictive time span based on the predicted estimated individual workloads for each emulation in the set of emulations generated by the workload predictor, a set of constraints, and an optimization function; and

a hypervisor to dynamically allocate sets of CPU processor cores to each emulation during each decision period over the predictive time span based on an output from the MIP engine;

wherein when the CPU processor cores of the host computer system are homogeneous, the set of constraints comprises:

a first constraint specifying that for all decision periods, the sum of the number of CPU processor cores assigned to all of the emulations is equal to a total number of CPU processor cores in the host computer system; and

a second constraint specifying that for all decision periods, the normalized workload of each emulation, during the decision period, is less than the amount of collective processing capacity of the set of CPU processor cores allocated to that emulation.

12. The host computer system of claim 11 , wherein the workload predictor uses a statistical model of each emulation's past workload history to predict the future workload levels of the emulations during the set of decision periods.

13. The host computer system of claim 11 , wherein the workload predictor uses a machine learning regression algorithm or a neural network model to predict the future workload levels of the emulations during the set of decision periods.

14. The host computer system of claim 11 , wherein when the CPU processor cores of the host computer system are homogeneous, the optimization function comprises

a first optimization feature to maximize the minimum spare capacity allocated to each emulation over the predictive time span to provide enhanced fault tolerance in the event of sudden workload changes; and

a second optimization feature to minimize a number of CPU processor core reassignments between emulations between subsequent decision periods.

15. The host computer system of claim 11 , wherein the workload predictor is configured to determine actual workload for each emulation during each decision period and, using the actual workload, to calculate updated estimated individual workloads for each emulation for subsequent decision periods of the predictive time span.

16. A host computer system, comprising:

a set of CPU processor cores;

a set of emulations using physical resources provided by the set of CPU processor cores;

a workload predictor to generate estimated individual workloads for each emulation in a set of emulations for each decision period of a set of decision periods over a predictive time span;

a Mixed Integer Programming (MIP) engine to determine sets of CPU processor cores to be allocated to each emulation during each decision period over the predictive time span based on the predicted estimated individual workloads for each emulation in the set of emulations generated by the workload predictor, a set of constraints, and an optimization function; and

a hypervisor to dynamically allocate sets of CPU processor cores to each emulation during each decision period over the predictive time span based on an output from the MIP engine;

wherein when the CPU processor cores of the host computer system are heterogeneous, the set of constraints comprises:

a first constraint specifying that for all decision periods, the sum of the number of CPU processor cores assigned to the set of emulations is equal to the total number of CPU processor cores in the host computer system;

a second constraint specifying that for all decision periods, each CPU processor cores is assigned to exactly one emulation and that no CPU processor core is unassigned; and

a third constraint specifying that for all decision periods, and for all emulations, the sum of the capacity of the CPU processor cores assigned to any given emulation will be greater than or equal to the normalized predicted workload of the given emulation during the decision period.

17. The host computer system of claim 16 , wherein when the CPU processor cores of the host computer system are heterogeneous, the optimization function comprises an optimization feature to minimize a number of CPU processor core reassignments between emulations between subsequent decision periods.

18. The host computer system of claim 16 , wherein the workload predictor uses a statistical model of each emulation's past workload history to predict the future workload levels of the emulations during the set of decision periods.

19. The host computer system of claim 16 , wherein the workload predictor uses a machine learning regression algorithm or a neural network model to predict the future workload levels of the emulations during the set of decision periods.

20. The host computer system of claim 16 , wherein the workload predictor is configured to determine actual workload for each emulation during each decision period and, using the actual workload, to calculate updated estimated individual workloads for each emulation for subsequent decision periods of the predictive time span.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (042769/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 059803/0802 →
RELEASE OF SECURITY INTEREST AT REEL 042768 FRAME 0585 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058297/0536 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2017
From: SINGH, SWEETESH; KAMRA, ASHISH
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 042800/0390 →
PATENT SECURITY INTEREST (CREDIT) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 042768/0585 →
PATENT SECURITY INTEREST (NOTES) Recorded Jun 12, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; MOZY, INC.; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 042769/0001 →