Gate signal line drive circuit
View Patent ↗A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.
1. A gate signal line drive circuit including a plurality of basic circuits that output respective gate signals which become an ON voltage in a signal ON period which is cyclically repeated, and become an OFF voltage in a signal OFF period which is a period other than the signal ON period to corresponding gate signal lines, each of the basic circuits comprising:
an ON voltage application switching element having an input terminal, a control terminal, and an output terminal electrically connecting to the gate signal line;
an OFF voltage application switching element having an input terminal, a control terminal, and an output terminal electrically connecting to the gate signal line;
a first OFF voltage application on control element having an input terminal, a control terminal, and an output terminal, the output terminal being electrically connected to the control terminal of the OFF voltage application switching element; and
a basic clock signal line applying a basic clock signal and electrically connecting to the input terminal of the ON voltage application switching element and the control terminal of the first OFF voltage application on control element,
wherein an ON voltage is applied to the control terminal of the ON voltage application switching element according to the signal ON period, to output the basic clock signal to the corresponding gate signal line,
wherein an ON voltage is applied to the control terminal of the OFF voltage application switching element at timing to change from the signal ON period to the signal OFF period, to output the OFF voltage to the corresponding gate signal line, and
wherein the first OFF voltage application on control element outputs the basic clock signal to the control terminal of the OFF voltage application switching element at timing when the basic clock signal changes from the OFF voltage to the ON voltage.
2. The gate signal line drive circuit according to claim 1 ,
wherein the plurality of basic circuits include a first basic circuit, and a second basic circuit,
wherein the signal ON period of the second basic circuit starts within one clock after a start of the signal ON period of the first basic circuit, and
wherein the control terminal of the ON voltage application switching element in the second basic circuit is connected to the control terminal of the OFF voltage application on control element in the first basic circuit.
3. The gate signal line drive circuit according to claim 1 ,
wherein each of the basic circuits further comprises a first OFF voltage application off control element that turns on after the first OFF voltage application on control element outputs the ON voltage of the basic clock signal to the control terminal of the OFF voltage application switching element, and outputs the OFF voltage to the control terminal of the OFF voltage application switching element.
4. A gate signal line drive circuit including a plurality of basic circuits that output respective gate signals which become an ON voltage in a signal ON period which is cyclically repeated, and become an OFF voltage in a signal OFF period which is a period other than the signal ON period to corresponding gate signal lines, each of the basic circuits comprising:
an ON voltage application switching element having an input terminal, a control terminal, and an output terminal electrically connecting to the gate signal line;
an OFF voltage application switching element having an input terminal, a control terminal, and an output terminal electrically connecting to the gate signal line;
a first OFF voltage application on control element having an input terminal, a control terminal, and an output terminal, the output terminal being electrically connected to the control terminal of the OFF voltage application switching element; and
a basic clock signal line applying a basic clock signal to the input terminal of the ON voltage application switching element and the control terminal of the first OFF voltage application on control element,
wherein an ON voltage is applied to the control terminal of the ON voltage application switching element according to the signal ON period, to output the basic clock signal to the corresponding gate signal line,
wherein an ON voltage is applied to the control terminal of the OFF voltage application switching element at timing to change from the signal ON period to the signal OFF period, to output the OFF voltage to the corresponding gate signal line, and
wherein the first OFF voltage application on control element outputs the basic clock signal to the control terminal of the OFF voltage application switching element at timing when the basic clock signal changes from the OFF voltage to the ON voltage.
5. The gate signal line drive circuit according to claim 4 ,
wherein the plurality of basic circuits include a first basic circuit, and a second basic circuit,
wherein the signal ON period of the second basic circuit starts within one clock after a start of the signal ON period of the first basic circuit, and
wherein the control terminal of the ON voltage application switching element in the second basic circuit is connected to the control terminal of the OFF voltage application on control element in the first basic circuit.
6. The gate signal line drive circuit according to claim 4 ,
wherein each of the basic circuits further comprises a first OFF voltage application off control element that turns on after the first OFF voltage application on control element outputs the ON voltage of the basic clock signal to the control terminal of the OFF voltage application switching element, and outputs the OFF voltage to the control terminal of the OFF voltage application switching element.