IP Library Granted Patent US 10,218,459
Granted Patent B2
US 10,218,459 · App. 15/584,198 · Granted Feb 26, 2019

Apparatus and methods for symbol timing error detection, tracking and correction

Inventors: Seung-Chul Hong (Carlsbad, CA); Anand Anandakumar (Carlsbad, CA); Curtis Ling (Carlsbad, CA)
Assignee: Maxlinear, Inc.
H04L1/0023H04L5/0007H04L7/0016H04L25/0216H04L27/265H04L27/2665H04L27/2671H04L27/2695
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Quick Facts
Patent No.
US 10,218,459
App. No.
15/584,198
Granted
Feb 26, 2019
Kind
B2
Abstract

Systems and methods for adjusting timing in a communication system, such as an OFDM system are described. In one implementation an error signal is generated to adjust the timing of a variable rate interpolator so as to adjust FFT timing. The error signal may be based on detection of significant peaks in an estimate of the impulse response of the channel, with the peak locations being tracked over subsequent symbols and the system timing adjusted in response to changes in the peaks.

Claims (50)

1. A method for communication, the method comprising:

in a demodulator of a receiver, said demodulator comprising a fast Fourier transform (FFT) module, timing control circuitry, and a combiner:

sampling, by said FFT module, an input signal to generate a digital output signal of the demodulator;

generating, by said timing control circuitry, a first error signal based on a first characteristic of an output of said FFT module;

generating, by said timing control circuitry, a second error signal based on a second characteristic of said output of said FFT module, said output of said FFT being processed by an inverse fast Fourier transform module for said generating;

selectively combining, by said combiner, said first error signal and said second error signal to generate a third error signal; and

controlling, by a variable rate interpolator, a sampling timing of said FFT module using said third error signal.

2. The method of claim 1 , wherein said first characteristic of said output of said FFT module is an offset between a clock of said receiver and a clock of a transmitter.

3. The method of claim 1 , wherein said selectively combining is such that said third error signal is initially equal to said first error signal and then subsequently equal to a combination of said first error signal and said second error signal.

4. The method of claim 3 , wherein said controlling of said FFT module using said third error signal is performed by said variable rate interpolator of said receiver, said variable rate interpolator receiving said third error signal from said combiner.

5. The method of claim 1 , comprising generating, by said timing control circuitry, a channel impulse response estimate, wherein said second characteristic of said output of said FFT module is said channel impulse response estimate.

6. The method of claim 1 , comprising generating, by said timing control circuitry, a channel impulse response estimate, wherein said second characteristic of said output of said FFT module is a location of a peak in said channel impulse response estimate.

7. The method of claim 1 , wherein said generating said second error signal comprises comparing a peak of a channel impulse response estimate to one or more reference values.

8. The method of claim 7 , comprising generating the reference values by:

setting a threshold value;

determining one or more pairs of threshold crossing points;

determining the one or more reference values based on the one or more pairs of threshold crossing points; and

storing the one or more reference values.

9. The method of claim 1 , wherein the generating the second error signal comprises:

determining a subset of peaks within one or more peaks of a channel impulse estimate, the subset consisting of peaks that are within a determined distance of at least one of a plurality of reference values; and

calculating a differences between at least one of the peaks of the subset and at least one of the reference values.

10. A system comprising:

a fast Fourier transform (FFT) module of a demodulator, said FFT module operable to sample an input signal to generate a digital output signal of said demodulator;

a signal characterization module operable to:

determine a first characteristic and a second characteristic of an output of said FFT module; and

generate a first error signal based on said first characteristic of said output of said FFT module; and

a control module operable to:

generate a second error signal based on said second characteristic of said output of said FFT module, said output of said FFT being processed by an inverse fast Fourier transform module;

selectively combine said first error signal and said second error signal to generate a third error signal; and

control, by a variable rate interpolator, a sampling timing of said FFT module based on said third error signal.

11. The system of claim 10 , wherein said first characteristic of said output of said FFT module is an offset between a clock of a receiver and a clock of a transmitter.

12. The system of claim 10 , wherein said selective combination is such that said third error signal is initially equal to said first error signal and then subsequently equal to a combination of said first error signal and said second error signal.

13. The system of claim 10 , wherein said variable rate interpolator is operable to control said FFT module using said third error signal received from a combiner.

14. The system of claim 10 , wherein:

said signal characterization module is operable to generate a channel impulse response estimate; and

said second characteristic of said output of said FFT module is said channel impulse response estimate.

15. The system of claim 10 , wherein:

said signal characterization module is operable to generate a channel impulse response estimate; and

said control module is operable to generate said second error signal based on a location of a peak of said channel impulse response estimate.

16. The system of claim 15 , wherein said control module is operable to:

compare said peak of said channel impulse response estimate to one or more reference values; and

generate said second error signal based on a result of said comparison.

17. The system of claim 16 , wherein said control module is operable to generate the reference values, wherein the generation comprises:

a setting of a threshold value;

a determination of one or more pairs of threshold crossing points;

a determination of the one or more reference vales based on the one or more pairs of threshold crossing points; and

a storing of the one or more reference values.

18. The system of claim 10 , wherein the generation of the second error signal comprises:

determination of a subset of peaks within one or more peaks of a channel impulse estimate, the subset consisting of peaks that are within a determined distance of at least one of a plurality of reference values; and

calculation of a difference between at least one of the peaks of the subset and at least one of the reference values.

Assignments (1)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
Continuity (6)
Continuation 15208544 · Jul 12, 2016
Continuation 14697569 · Apr 27, 2015
Continuation 14040830 · Sep 30, 2013
Continuation 12947667 · Nov 16, 2010
Provisional Application 61261659 · Nov 16, 2009
Related Publication 20170237521A1 · Aug 17, 2017