IP Library Granted Patent US 10,388,823
Granted Patent B2
US 10,388,823 · App. 15/594,519 · Granted Aug 20, 2019

Semiconductor chip and method for producing a semiconductor chip

Inventors: Alfred Lell (Maxhuette-Haidhof, DE); Andreas Loeffler (Neutraubling, DE); Christoph Eichler (Donaustauf, DE); Bernhard Stojetz (Wiesent, DE); Andre Somers (Obertraubling, DE)
Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
H01L33/0025H01L21/67115H01L21/68764H01L21/68771H01L33/007H01L33/0075H01L33/0095H01L33/26H01L33/62H01S5/1082H01S5/222H01S5/2219H01S5/3205H01S5/4031H01L33/32H01S5/026H01S5/2036H01S5/227H01S5/32341H01S2301/176H01S2301/18
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Quick Facts
Patent No.
US 10,388,823
App. No.
15/594,519
Granted
Aug 20, 2019
Kind
B2
Abstract

A semiconductor chip ( 100 ) is provided, having a first semiconductor layer ( 1 ), which has a lateral variation of a material composition along at least one direction of extent. Additionally provided is a method for producing a semiconductor chip ( 100 ).

Claims (23)

1. A semiconductor chip, having a first semiconductor layer, which has a lateral variation of a material composition along at least one direction of extent,

wherein the first semiconductor layer has a constant thickness,

wherein

the first semiconductor layer has at least one first region and, laterally adjacent thereto, at least one second region,

the at least one first region and the at least one second region have a same material system, and

a material composition of each first region is different from a material composition of its laterally adjacent second region, wherein each first region and its laterally adjacent second region have a same thickness,

wherein

the semiconductor chip is embodied as a light-emitting diode chip, and has at least one contact layer embodied, at least partly, as a bond pad, and

each second region is arranged beneath a corresponding bond pad, and

wherein

the at least one contact layer has current-carrying ridges, and

each second region is formed beneath corresponding current-carrying ridges.

2. The semiconductor chip according to claim 1 , wherein

each second region encloses its laterally adjacent first region in a lateral direction of its laterally adjacent first region and uninterruptedly adjoins a periphery of the semiconductor chip.

3. The semiconductor chip according to claim 1 wherein the material composition of each first region and the material composition of its laterally adjacent second region are selected such that an energy gap in each second region is greater than an energy gap in its laterally adjacent first region.

4. The semiconductor chip according to claim 1 , wherein the material composition of each first region and the material composition of its laterally adjacent second region are selected such that an energy gap in each second region is less than an energy gap in its laterally adjacent first region.

5. The semiconductor chip according to claim 1 , wherein the first semiconductor layer is at least a part of an active layer.

6. The semiconductor chip according to claim 1 , wherein the first semiconductor layer is based on a material system InAlGaN, and an In content of InAlGaN is varied for the purpose of the lateral variation of the material composition.

7. The semiconductor chip according to claim 1 , wherein the lateral variation of the material composition has, at least partly, a stepped characteristic.

8. The semiconductor chip according to claim 1 , wherein the lateral variation of the material composition has, at least partly, a continuous characteristic.

9. Method for producing a semiconductor chip according to claim 1 , in which, during a growth process for growing the first semiconductor layer, an inhomogeneous lateral temperature distribution is created along the at least one direction of extent of the growing first semiconductor layer, such that the lateral variation of the material composition of the first semiconductor layer is produced.

10. Method according to claim 9 , in which the inhomogeneous lateral temperature distribution is selectively created, at least partly, by a locally varying light irradiation.

11. Method according to claim 9 , in which the inhomogeneous lateral temperature distribution is selectively created, at least partly, by a temperature distribution structure, which has at least one temperature distribution structure element, which effects a local increase or reduction of the temperature of the growing first semiconductor layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2017
From: LELL, ALFRED; LOEFFLER, ANDREAS; EICHLER, CHRISTOPH; STOJETZ, BERNHARD; SOMERS, ANDRE
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 043161/0779 →
Priority Claims (1)
DE 10 2016 108 891 · May 13, 2016 · national
Continuity (1)
Related Publication 20170330996A1 · Nov 16, 2017