IP Library Granted Patent US 10,522,674
Granted Patent B2
US 10,522,674 · App. 15/597,469 · Granted Dec 31, 2019

Semiconductor with unified transistor structure and voltage regulator diode

Inventor: Kentaro Nasu (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L29/7808H01L27/0251H01L27/0255H01L29/16H01L29/41758H01L29/4238H01L29/7811H01L29/7813H01L29/866
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Quick Facts
Patent No.
US 10,522,674
App. No.
15/597,469
Granted
Dec 31, 2019
Kind
B2
Abstract

A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.

Claims (21)

1. A semiconductor device comprising:

a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region; and

a voltage-regulator diode disposed at the semiconductor layer, the voltage-regulator diode having an n type portion connected to the p type source region through a first conductive path and a p type portion electrically connected to the gate electrode by a metal member through a second conductive path electrically separated from the first conductive path, the p type portion being in direct contact with the metal member without any pn junction,

wherein the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.

2. The semiconductor device according to claim 1 , wherein the semiconductor layer includes an active region including the transistor structure and an outer peripheral region surrounding the active region, and

the voltage-regulator diode includes an outer peripheral diode disposed along the outer peripheral region.

3. The semiconductor device according to claim 2 , wherein, in the outer peripheral diode, the p type portion and the n type portion are each formed in an annular shape surrounding the active region, and

a pn junction portion between the p type portion and the n type portion has an integral structure formed in an annular shape surrounding the active region.

4. The semiconductor device according to claim 3 , wherein the p type portion and the n type portion each have a width equal to each other.

5. The semiconductor device according to claim 3 , wherein, in the outer peripheral diode, the n type portion is disposed at a more inward side than the p type portion.

6. The semiconductor device according to claim 1 , wherein the voltage-regulator diode is made of polysilicon stacked on the semiconductor layer.

7. The semiconductor device according to claim 6 , wherein the transistor structure includes a trench gate structure made of polysilicon as the gate electrode embedded in a gate trench which is formed at the semiconductor layer.

8. The semiconductor device according to claim 1 , wherein the voltage-regulator diode is made of an impurity region disposed in the semiconductor layer.

9. The semiconductor device according to claim 1 , wherein a breakdown voltage of the voltage-regulator diode is 8 V or less.

10. The semiconductor device according to claim 1 , the semiconductor device having a length-breadth chip size of 0.6 mm ×0.4 mm or less.

11. The semiconductor device according to claim 1 , wherein

the metal member includes a gate finger surrounding the active region, and

the p type portion is in direct contact with the gate finger.

12. The semiconductor device according to claim 1 , wherein

the first conductive path includes a source metal connected to the p type source region and the n type body region, and

the metal member includes a gate finger surrounding the source metal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2017
From: NASU, KENTARO
To: ROHM CO., LTD.
Reel/Frame 042487/0080 →
Priority Claims (2)
JP 2016-099748 · May 18, 2016 · national
JP 2017-079993 · Apr 13, 2017 · national
Continuity (1)
Related Publication 20170338336A1 · Nov 23, 2017
Cited By (1)
US 12,701,729