IP Library Granted Patent US 10,285,227
Granted Patent B2
US 10,285,227 · App. 15/598,682 · Granted May 7, 2019

Programmable and adaptable interface for dimming light emitting diodes

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Quick Facts
Patent No.
US 10,285,227
App. No.
15/598,682
Granted
May 7, 2019
Kind
B2
Abstract

Described herein is an apparatus including, a decoder that is configured to decode a digital control code. The digital control code corresponds to an intensity level control code of a plurality of LEDs. The apparatus includes a modulator that modulates a combination of the decoded control code and a dither signal, wherein the combined signal has a first modulation format. The apparatus also includes a converter that generates a dimming control signal by converting the first modulation format associated with the combined signal to a programmable second modulation format.

Claims (33)

1. A device comprising:

circuitry configured to

receive and decode an input signal, the decoded input signal having a first modulation format,

generate a light emitting diode (LED) dimming signal by converting the first modulation format to a second modulation format,

add a dither signal to the decoded input signal to form a dithered input signal;

modulate the dithered input signal to have the first modulation format, and

over-sample the dithered input signal at an over-sampling ratio that is programmable with respect to the input signal, the input signal being a digital signal corresponding to an intensity level of an LED.

2. The device of claim 1 , wherein the second modulation format is one of a delta sigma modulation, a pulse width modulation, a pulse amplitude modulation, a direct current modulation, and a pulse density modulation.

3. The device of claim 1 , wherein the first modulation for at is delta-sigma modulation.

4. The device of claim 1 , wherein the first modulation format is identical to the second modulation format.

5. The device of claim 1 , wherein the circuitry is configured to covert the first modulation format to the second modulation format based on a counter.

6. A method for generating a light-emitting-diode (LED) dimming signal, the method comprising:

receiving and decoding an input signal, the input signal being an N-bit digital signal, and the decoded input signal having a first modulation format;

generating by the circuitry, the LED dimming signal by converting the first modulation format to a second modulation format;

adding a dither signal to the decoded input signal to form a dithered input signal;

modulating by the circuitry the dithered input signal to have the first modulation format; and

over-sampling the dithered input signal at an over-sampling ratio that is programmable with respect to the input signal, the input signal corresponding to an intensity level of an LED.

7. The method of claim 6 , wherein the second modulation format is one of a delta sigma modulation, a pulse width modulation, a pulse amplitude modulation, a direct current modulation, and a pulse density modulation.

8. The method of claim 6 , wherein the first modulation format is delta-sigma modulation.

9. The method of claim 6 , further comprising:

converting via a counter, the first modulation format to the second modulation format.

10. An apparatus comprising:

a decoder configured to decode a digital control code;

a modulator configured to modulate a combination of the decoded control code and a dither signal, the combined signal having a first modulation format; and

a converter configured to generate a dimming signal by converting the first modulation format associated with the combined signal to a second modulation format, wherein

the dither signal is over-sampled at an over-sampling ratio that is programmable with respect to the digital control code, the digital control code corresponding to an intensity level of a plurality of LEDs.

11. The apparatus of claim 10 , wherein the first modulation format associated with the combined signal is a delta-sigma modulation, and the second modulation format associated with the dimming signal is one of a delta sigma modulation, a pulse width modulation, a pulse amplitude modulation, and a pulse density modulation.

12. The apparatus of claim 10 , wherein the modulator is a delta-sigma modulator, and the converter is a counter.

13. The apparatus of claim 10 , further comprising:

a low-pass filter configured to convert a pulse-modulated signal to a high-precision DC signal without using a high-resolution DAC.

14. The apparatus of claim 10 , wherein the dither signal is a random-noise signal.

15. The apparatus of claim 10 , further comprising:

a buffer configured to scale a magnitude of the generated dimming signal based on a plurality of LEDs.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER AND APPLICATION NOS. 13/237,550 AND 16/103,107 FROM THE MERGER PREVIOUSLY RECORDED ON REEL 047231 FRAME 0369. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048549/0113 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047231/0369 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2017
From: PAN, HUI; WANG, JINGGUANG; WEETMAN, MARTIN
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 042547/0871 →