Semiconductor switch control device
View Patent ↗The semiconductor switch control device includes a first FET provided between an anode of a battery and a load and a second FET arranged between a cathode of the battery and the load, in which in a case where a current value that is larger than an abnormal current value indicating that a first drain current flowing through the first FET is an overcurrent and smaller than a maximum current value of the first drain current that can be tolerated by the first FET is set as a current limit value, a limiting gate voltage for setting the current value of the first drain current to a current limit value is applied to the second FET.
1. A semiconductor switch control device comprising:
a first semiconductor switch provided between an anode of a power supply and a load to conduct or block a current flowing from the power supply to the load;
a second semiconductor switch provided between the load and a cathode of the power supply to regulate the current flowing from the load to the power supply according to an applied setting gate voltage and limit a current flowing through the first semiconductor switch; and
a controller configured to control the first semiconductor switch and the second semiconductor switch, wherein
in a case where a current value that is larger than an abnormal current value indicating that a first semiconductor input current which is the current flowing through the first semiconductor switch is an overcurrent and smaller than a maximum current value of a current which is larger than the abnormal current value and can be tolerated by the first semiconductor switch is set as a current limit value, the controller applies a limiting gate voltage to the second semiconductor switch such that the limiting gate voltage sets a current value of the first semiconductor input current to the current limit value.
2. The semiconductor switch control device according to claim 1 , wherein
the first semiconductor switch can regulate the current flowing from the power supply to the load according to an applied gate voltage and is applied with a gate voltage that is not limited to a conducting current.
3. The semiconductor switch control device according to claim 1 , wherein
in a case where the current value of the first semiconductor input current is equal to or smaller than the abnormal current value, the controller applies a gate voltage equivalent to a gate voltage applied to the first semiconductor switch to the second semiconductor switch, and
in a case where the current value of the first semiconductor input current is larger than the abnormal current value, the controller applies the limiting gate voltage to the second semiconductor switch.
4. The semiconductor switch control device according to claim 2 , wherein
in a case where the current value of the first semiconductor input current is equal to or smaller than the abnormal current value, the controller applies a gate voltage equivalent to a gate voltage applied to the first semiconductor switch to the second semiconductor switch, and
in a case where the current value of the first semiconductor input current is larger than the abnormal current value, the controller applies the limiting gate voltage to the second semiconductor switch.
5. A semiconductor switch control device comprising:
a first semiconductor switch provided between an anode of a power supply and a load to conduct or block a current flowing from the power supply to the load;
a second semiconductor switch provided between the load and a cathode of the power supply to regulate the current flowing from the load to the power supply according to an applied setting gate voltage and limit a current flowing through the first semiconductor switch; and
a controller configured to control the first semiconductor switch and the second semiconductor switch, wherein
in a case where a current value that is larger than an abnormal current value indicating that a first semiconductor input current which is the current flowing through the first semiconductor switch is an overcurrent and smaller than a maximum current value of a current which is larger than the abnormal current value and can be tolerated by the first semiconductor switch is set as a current limit value, the controller applies a limiting gate voltage to the second semiconductor switch such that the limiting gate voltage sets a current value of the first semiconductor input current to the current limit value,
the controller turns off the first semiconductor switch when the first semiconductor input current does not become equal to or less than the abnormal current value in a blocking determination time from when the first semiconductor input current reaches the abnormal current value until when the first semiconductor switch is determined to be blocked, and
the controller does not turn off the first semiconductor switch when the first semiconductor input current reaches the abnormal current value and the first semiconductor input current becomes equal to or lower than the abnormal current value before the blocking determination time elapses.