Oscillator circuit with low dropout regulator
A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump. The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.
1. A circuit, comprising:
an oscillator configured to generate an oscillation clock signal;
an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line configured to receive a first power supply voltage;
an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator;
a first switch connected between a second power supply line configured to receive a second power supply voltage and the power terminal of the oscillator; and
a charge pump configured to:
generate a boosted power supply voltage by boosting the first power supply voltage using at least one of the oscillation clock signal and a clock signal generated from the oscillation clock signal; and
supply the boosted power supply voltage to the power terminal of the operational amplifier.
2. The circuit according to claim 1 , wherein the first switch is configured to couple the power terminal of the oscillator with the second power supply line based at least in part on a control signal.
3. The circuit according to claim 1 , further comprising:
a controller configured to control the first switch based on a voltage of the power terminal of the operational amplifier.
4. The circuit according to claim 3 , further comprising:
a timer circuit configured to turn on the first switch in response to starting-up an integrated circuit which comprises the circuit, wherein the timer circuit is configured to start a time counting operation and to turn off the first switch when a predetermined time passes from the start of the time counting operation.
5. The circuit according to claim 1 , wherein the circuit is an integrated circuit.
6. The circuit according to claim 1 , further comprising a second switch connected between a third power supply line configured to receive a third power supply voltage and a power terminal of the operational amplifier.
7. The circuit according to claim 6 , wherein the second switch is configured to couple the power terminal of the operational amplifier with the third power supply line based at least in part on a control signal.
8. The circuit according to claim 6 , further comprising:
a controller configured to control the second switch based on the voltage of the power terminal of the operational amplifier.
9. The circuit according to claim 6 , further comprising:
a timer circuit configured to turn on the second switch based on starting-up an integrated circuit which comprises the circuit to start a time counting operation, wherein the timer circuit is configured to turn off the second switch when a predetermined time elapses from the start of the time counting operation.
10. A circuit comprising:
an oscillator configured to generate an oscillation clock signal;
an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line configured to receive a first power supply voltage;
an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator;
a first switch connected between a second power supply line configured to receive a second power supply voltage and a power terminal of the operational amplifier; and
a charge pump configured to:
generate a boosted power supply voltage by boosting the first power supply voltage using at least one of the oscillation clock signal and a clock signal generated from the oscillation clock signal; and
supply the boosted power supply voltage to the power terminal of the operational amplifier.
11. The circuit according to claim 10 , wherein the first switch is configured to couple the power terminal of the operational amplifier with the second power supply line based at least in part on a control signal.
12. The circuit according to claim 10 , further comprising:
a controller configured to control the first switch based on the voltage of the power terminal of the operational amplifier.
13. The circuit according to claim 10 , further comprising:
a timer circuit configured to turn on the first switch based on starting-up an integrated circuit which comprises the circuit to start a time counting operation, wherein the timer circuit is configured to turn off the first switch when a predetermined time elapses from the start of the time counting operation.
14. The circuit according to claim 10 , wherein the circuit is an integrated circuit.
15. The circuit according to claim 10 , further comprising:
a second switch connected between a third power supply line configured to receive a third power supply voltage and the power terminal of the oscillator.
16. The circuit according to claim 15 , wherein the second switch is configured to couple the power terminal of the oscillator with the third power supply line based at least in part on a control signal.
17. The circuit according to claim 15 , further comprising:
a controller configured to control the second switch based on a voltage of the power terminal of the operational amplifier.
18. The circuit according to claim 15 , further comprising:
a timer circuit configured to turn on the second switch in response to starting-up an integrated circuit which comprises the circuit, wherein the timer circuit is configured to start a time counting operation and to turn off the second switch when a predetermined time passes from the start of the time counting operation.
19. A circuit comprising:
an oscillator configured to generate an oscillation clock signal;
an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line configured to receive a first power supply voltage;
an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator;
a frequency divider configured to:
frequency-divide the oscillation clock signal to generate a frequency-division clock signal; and
control a frequency division ratio based on a control signal when frequency-dividing the oscillation clock signal; and
a charge pump configured to:
generate a boosted power supply voltage by boosting the first power supply voltage using the frequency-division clock signal; and
supply the boosted power supply voltage to the power terminal of the operational amplifier.
20. The circuit according to claim 19 , wherein the circuit is an integrated circuit.