IP Library Granted Patent US 10,460,774
Granted Patent B2
US 10,460,774 · App. 15/607,148 · Granted Oct 29, 2019

Apparatus and method capable of removing duplication write of data in memory

Inventor: Dong-Sop Lee (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G11C7/1006G06F12/1018G06F13/1684G11C7/109G11C7/1048G11C29/10G11C29/20G11C29/74G06F2212/1044Y02D10/13Y02D10/14
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Quick Facts
Patent No.
US 10,460,774
App. No.
15/607,148
Granted
Oct 29, 2019
Kind
B2
Abstract

This technology relates to a memory control apparatus for processing data into a memory device and an operating method of the memory control apparatus. A method for controlling a memory may include converting received program data with a first address into compressed data, searching a deduplication table including compressed data, a second address of a memory device in which non-compressed data corresponding to the compressed data has been written and a counter indicative of the write number of the data for the converted compressed data, and if the converted compressed data is searched for in the deduplication table, mapping a second address corresponding to the compressed data in the deduplication table to the first address, not performing a write operation of the memory device for the received program data, and updating the deduplication table.

Claims (82)

1. An apparatus for controlling memory, the apparatus comprising:

a memory device; and

a controller functionally coupled to the memory device;

a deduplication table for storing compressed data, a physical block address of the memory device in which non-compressed data corresponding to the compressed data has been written and a count value indicative of a write number of the data,

wherein the controller is suitable for:

compressing program data of a logical block address received in a data write operation;

searching for the compressed data in the deduplication table;

if the compressed data is new, writing the program data in the physical block address of the memory device; and

registering a new entry comprising the compressed data and the physical block address with the deduplication table, the compressed data comprising a hash value obtained by a hash algorithm,

wherein the controller is suitable for:

converting the program data with the logical block address into a hash value;

reading data stored in the physical block address of the memory device mapped to a retrieved hash value if the hash value is searched for in the deduplication table;

comparing the program data with the read data;

assigning another physical block address for writing the program data in the memory device if, as a result of the comparison, it is determined that the program data and the read data are different;

writing the program data in the assigned another physical block address of the memory device; and

additionally registering a new entry comprising the hash value and said another physical block address with the deduplication table, and

wherein the controller is suitable for:

selecting the physical block address mapped to a hash value having a greatest counter value if data is searched for in the deduplication table;

reading data written in the physical block address of the memory device;

selecting another physical block address mapped to a hash value having a counter value of next priority if read data is different from the program data; and

reading data written in said another physical block address of the memory device.

2. The apparatus of claim 1 , wherein the controller is suitable for:

converting the program data with the logical block address into a hash value;

reading data stored in the physical block address of the memory device mapped to the retrieved hash value if the hash value is searched for in the deduplication table; and

mapping the physical block address to the logical block address if the received program data and the read data are identical.

3. The apparatus of claim 2 , wherein the controller is suitable for:

assigning the physical block address for writing the program data in the memory device;

writing the program data in the assigned physical block address of the memory device if the program data and the read data are different; and

mapping the assigned physical block address to the first logical block address.

4. The apparatus of claim 2 , wherein the controller is suitable for:

when an erase command is generated, checking a physical block address mapped to a logical block address of erase data; and

updating information about a corresponding entry if, as a result of the check, it is determined that the physical block address has been registered with the deduplication table.

5. The apparatus of claim 4 , wherein the controller is suitable for:

checking a counter value of an entry with which the physical block address has been registered if an erase type is erase/trim;

decreasing the counter value of the entry if, as a result of the check, it is determined that the counter value is 2 or higher; and

deleting the entry and erasing the data written in the physical block address of the memory device if, as a result of the check, it is found that the counter value is 1.

6. The apparatus of claim 5 , wherein the controller is suitable for:

writing data in a changed physical block address of the memory device if the erase type is a garbage collection; and

updating the deduplication table by registering the changed physical block address with a corresponding entry of the deduplication table.

7. An apparatus for controlling memory, comprising:

a memory device; and

a controller functionally coupled to the memory device, and including a deduplication table for storing lossless compressed data and a first address of the memory device in which non-compressed data corresponding to the lossless compressed data is stored,

wherein the controller is suitable for:

lossless compressing received program data with a second address;

mapping the first address of retrieved lossless compressed data to the second address if the lossless compressed data is searched for in the deduplication table; and

not writing the program data in the memory device for the received program data.

8. The apparatus of claim 7 ,

wherein the controller is further suitable for:

searching the deduplication table for the hash value if the lossless compressed data is not searched for;

reading data of a first address corresponding to the retrieved hash value in the memory device from the memory device if, as a result of the search, it is determined that the hash value is searched for;

comparing the program data with the read data; and

mapping a first address mapped to the hash value to the first address if, as a result of the comparison, it is determined that the program data is identical with the read data.

9. A method for controlling a memory, comprising:

converting received program data with a logical block address into compressed data;

searching a deduplication table including compressed data, a physical block address of a memory device in which non-compressed data corresponding to the compressed data has been written and a counter indicative of a write number of the data for the converted compressed data;

writing the program data in the physical block address of the memory device if the converted compressed data is not searched for in the deduplication table;

registering a new entry comprising the compressed data and the physical block address with the deduplication table, the compressed data comprising a hash value converted from the program data by a hash algorithm;

assigning a physical block address for writing the program data in the memory device if the program data and the read data are different;

writing the program data in the assigned physical block address of the memory device;

mapping the physical block address to the logical block address;

additionally registering a new entry comprising the hash value and the physical block address with the deduplication table;

selecting another physical block address mapped to a hash value having a counter value of next priority if the read data is different from the program data;

reading data written in said another physical block address of the memory device; and

comparing the read data with the program data.

10. The method of claim 9 , wherein the updating of the deduplication table comprises:

reading data corresponding to the physical block address mapped to the retrieved hash value from the memory device if the hash value is searched for in the deduplication table; and

mapping the physical block address to the logical block address and increasing a counter value of a corresponding entry if the received program data is identical with the read data.

11. The method of claim 10 , further comprising programming data into the memory device,

wherein the programming of the data comprises:

assigning a physical block address for writing the programmed data in the memory device if the programmed data and the read data are different;

writing the programmed data in the assigned physical block address of the memory device; and

mapping the assigned physical block address to the logical block address.

12. The method of claim 10 , further comprising:

when an erase command is generated, checking a physical block address mapped to a logical block address of erase data, and

updating information about a corresponding entry if, as a result of the check, it is determined that the physical block address has been registered with the deduplication table.

13. The method of claim 12 , wherein the updating of the information about the corresponding entry comprises:

checking a counter value of an entry with which the physical block address has been registered if an erase type is erase/trim;

decreasing the counter value of the entry if, as a result of the check, it is determined that the counter value is 2 or higher; and

deleting the entry and erasing the data written in the physical block address of the memory device if, as a result of the check, it is determined that the counter value is 1.

14. The method of claim 12 , wherein the updating of the information about the corresponding entry comprises:

writing data in a changed physical block address of the memory device if the erase type is a garbage collection; and

updating the deduplication table by registering the changed physical block address with a corresponding entry of the deduplication table.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: LEE, DONG-SOP
To: SK HYNIX INC.
Reel/Frame 042519/0627 →
Cited By (2)
US 12,197,755 US 12,395,336