Resonance circuit with a single crystal capacitor dielectric material

1. A method for fabricating a single crystal acoustic electronic device the method comprising:

providing a substrate having a via cavity formed through a portion of the substrate, the substrate having a surface region and a backside surface region;

forming a first electrode material coupled to a portion of the backside surface region and spatially configured within the via cavity;

forming a single crystal capacitor dielectric material having a thickness of greater than 0.4 microns and overlying the via cavity and coupled to the first electrode material through the via cavity, the single crystal capacitor dielectric material being characterized by a dislocation density of less than 10 12 defects/cm 2 ; and

forming a second electrode material overlying the single crystal capacitor dielectric material.

2. The method of claim 1 wherein the single crystal capacitor material is selected from at least one of AlN, AlGaN, InN, BN, or other group III nitrides.

3. The method of claim 1 wherein the single crystal capacitor material is selected from at least one of a single crystal oxide including a high K dielectric, ZnO, or MgO.

4. The method of claim 1 wherein the single crystal capacitor dielectric material is characterized by a surface region of at least 200 micron by 200 micron.

5. The method of claim 1 wherein the single crystal capacitor dielectric material is configured in a first strain state to compensate to the substrate; wherein the single crystal capacitor dielectric material is deposited overlying the exposed portion of the substrate.

6. A method of fabricating a single crystal acoustic electronic device, the method comprising:

providing a substrate having a via cavity formed through a portion of the substrate, the substrate having a surface region and a backside surface region;

forming a first electrode material coupled to a portion of the backside surface region and spatially configured within the via cavity to form a via structure within a portion of the substrate;

forming a single crystal capacitor dielectric material having a thickness of greater than 0.4 microns and overlying the via cavity and coupled to the first electrode material through the via cavity, the single crystal capacitor dielectric material being characterized by a dislocation density of less than 10 12 defects/cm 2 ; and

forming a second electrode material overlying the single crystal capacitor dielectric material.

7. The method of claim 6 wherein the surface region is configured in an off-set angle.

8. The method of claim 6 further comprising a reflector region configured to the first electrode material.

9. The method of claim 6 further comprising a reflector region configured to the second electrode material; wherein each of the first electrode material and the second electrode material is selected from a refractory metal.

10. The method of claim 6 wherein the each of the first electrode material and the second electrode material is selected from one of tantalum or molybdenum.

11. The method of claim 6 wherein the first electrode material and the single crystal capacitor dielectric material comprises a first interface region substantially free from an oxide bearing material.

12. The method of claim 6 wherein the first electrode material and the single crystal capacitor dielectric material comprises a second interface region substantially free from an oxide bearing material.

13. The method of claim 6 further comprising a nucleation material provided between the single crystal capacitor dielectric material and the first electrode material; and further comprising a capping material provided between the single crystal capacitor dielectric material and the second electrode material.

14. The method of claim 6 wherein the single crystal capacitor dielectric material is characterized by a FWHM of less than one degree; and further comprising a parameter derived from a two port analysis.

15. The method of claim 6 wherein the first electrode material comprises a first electrode structure configured and routed to a vicinity of a plane parallel to a contact region coupled to the second electrode material.

16. The method of claim 6 wherein the surface region of the substrate is bare and exposed crystalline material.

17. The method of claim 6 wherein the single crystal capacitor dielectric is configured to propagate a longitudinal signal at an acoustic velocity of 6000 meters/second and greater; and further comprising a first contact coupled to the first electrode material and a second contact coupled to the second electrode material such that each of the first contact and the second contact are configured in a co-planar arrangement.

18. The method of claim 6 wherein the semiconductor substrate is selected from a silicon, a gallium arsenide, gallium nitride, aluminum nitride, an aluminum oxide, or others.

19. A single crystal acoustic electronic device comprising:

a substrate, the substrate having a surface region and a backside surface region;

a via cavity through a portion of the substrate;

a single crystal capacitor dielectric material having a thickness of greater than 0.4 microns and overlying the via cavity, the single crystal capacitor dielectric material being characterized by a dislocation density of less than 10 12 defects/cm 2 ;

a first electrode material coupled to the single crystal capacitor dielectric material through the via cavity, the first electrode material being coupled to a portion of the backside surface region and spatially configured within the via cavity; and

a second electrode material overlying the single crystal capacitor dielectric material;

a nucleating material overlying the surface region; and a thickness of the single crystal capacitor dielectric overlying the nucleating material.

20. The device of claim 19 wherein the single crystal capacitor material is selected from at least one of AlN, AlGaN, InN, BN, or other group III nitrides.

21. The device of claim 19 wherein the single crystal capacitor material is selected from at least one of a single crystal oxide including a high K dielectric, ZnO, or MgO.

22. The device of claim 19 wherein the single crystal capacitor dielectric material is characterized by a surface region of at least 200 micron by 200 micron.

23. The device of claim 19 wherein the single crystal capacitor dielectric material is configured in a first strain state to compensate to the substrate.

24. A single crystal acoustic electronic device comprising:

a substrate, the substrate having a surface region and a backside surface region;

a via cavity through a portion of the substrate;

a single crystal capacitor dielectric material having a thickness of greater than 0.4 microns and overlying the via cavity, the single crystal capacitor dielectric material being characterized by a dislocation density of less than 10 12 defects/cm 2 ;

a first electrode material coupled to the single crystal capacitor dielectric material through the via cavity, the first electrode material being coupled to a portion of the backside surface region and spatially configured within the via cavity; and

a second electrode material overlying the single crystal capacitor dielectric material.

25. A device of fabricating a single crystal acoustic electronic device comprising:

a substrate, the substrate having a surface region and a backside surface region;

a via cavity through a portion of the substrate;

a single crystal capacitor dielectric material having a thickness of greater than 0.4 microns and overlying the via cavity, the single crystal capacitor dielectric material being characterized by a dislocation density of less than 10 12 defects/cm 2 ;

a first electrode material coupled to the single crystal capacitor dielectric material through the via cavity, the first electrode material being coupled to a portion of the backside surface region and spatially configured within the via cavity to form a via structure within a portion of the substrate; and

a second electrode material overlying the single crystal capacitor dielectric material.

26. The device of claim 25 wherein the surface region is configured in an off-set angle.

27. The device of claim 25 further comprising a reflector region configured to the first electrode material.

28. The device of claim 25 further comprising a reflector region configured to the second electrode material.

29. The device of claim 25 wherein each of the first electrode material and the second electrode material is selected from a refractory metal.

30. The device of claim 25 wherein the each of the first electrode material and the second electrode material is selected from one of tantalum or molybdenum.

31. The device of claim 25 wherein the first electrode material and the single crystal capacitor dielectric material comprises a first interface region substantially free from an oxide bearing material.

32. The device of claim 25 wherein the first electrode material and the single crystal capacitor dielectric material comprises a second interface region substantially free from an oxide bearing material.

33. The device of claim 25 further comprising a nucleation material provided between the single crystal capacitor dielectric material and the first electrode material.

34. The device of claim 25 further comprising a capping material provided between the single crystal capacitor dielectric material and the second electrode material.

35. The device of claim 25 wherein the single crystal capacitor dielectric material is characterized by a FWHM of less than one degree.

36. The device of claim 25 further comprising a parameter derived from a two port analysis.

37. The device of claim 25 wherein the first electrode material comprises a first electrode structure configured and routed to a vicinity of a plane parallel to a contact region coupled to the second electrode material.

38. The device of claim 25 wherein the surface region of the substrate is bare and exposed crystalline material.

39. The device of claim 25 wherein the single crystal capacitor dielectric is configured to propagate a longitudinal signal at an acoustic velocity of 6000 meters/second and greater.

40. The device of claim 25 wherein the forming of the single crystal capacitor dielectric is deposited at a temperature ranging from 400 Degrees Celsius to 1200 Degrees Celsius.

41. The device of claim 25 wherein the single crystal capacitor dielectric comprising a surface roughness of 2 nm and less, RMS by atomic force microscopy.

42. The device of claim 25 wherein the substrate is selected from a silicon, a gallium arsenide, an aluminum oxide, or others.