High electron mobility transistor
A high electron mobility transistor includes a first III-V compound layer, a second III-V compound layer, a source electrode, a drain electrode, a gate electrode, a first moat, and a second moat. The second III-V compound layer is disposed on the first III-V compound layer. The source electrode and the drain electrodes are disposed above the first III-V compound layer. The gate electrode is disposed above the second III-V compound layer located between the source and the drain electrodes in a first direction. The second III-V compound layer includes a first region under the gate electrode. The first moat is at least partially disposed between the first region and the source electrode in the first direction. The second moat is at least partially disposed between the first region and the drain electrode in the first direction.
1. A high electron mobility transistor (HEMT), comprising:
a first III-V compound layer;
a second III-V compound layer disposed on the first III-V compound layer, wherein the second III-V compound layer is different from the first III-V compound layer in composition;
a source electrode and a drain electrode disposed above the second III-V compound layer;
a gate electrode disposed over the second III-V compound layer located between the source electrode and the drain electrode in a first direction, wherein the second III-V compound layer comprises a first region disposed under the gate electrode;
a first moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the source electrode in the first direction;
a second moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the drain electrode in the first direction, wherein the gate electrode is partially disposed in the first moat and the second moat, and the gate electrode overlaps a part of the second III-V compound layer disposed between the first moat and the source electrode; and
a gate dielectric layer disposed on the second III-V compound layer, wherein the first moat is filled with the gate dielectric layer and the gate electrode.
2. The HEMT of claim 1 , wherein the first moat and the second moat are separated from each other.
3. The HEMT of claim 1 , wherein the first moat and the second moat are connected to each other.
4. The HEMT of claim 3 , wherein a first moat structure comprising the first moat and the second moat surrounds the first region of the second III-V compound layer in the first direction and a second direction perpendicular to the first direction.
5. The HEMT of claim 1 , further comprising:
a fluorine region disposed in the second III-V compound layer, wherein at least a part of the fluorine region is disposed in the first region of the second III-V compound layer.
6. The HEMT of claim 5 , wherein at least a part of the fluorine region is disposed between the first moat and the second moat in the first direction.
7. The HEMT of claim 1 , wherein a length of the first moat in the first direction is shorter than a length of the second moat in the first direction.
8. The HEMT of claim 1 , wherein a length of the second moat in the first direction is shorter than a length of the first moat in the first direction.
9. The HEMT of claim 1 , wherein a length of the first moat in the first direction is equal to a length of the second moat in the first direction.
10. The HEMT of claim 1 , wherein the gate electrode overlaps a part of the second III-V compound layer disposed between the second moat and the drain electrode.
11. The HEMT of claim 10 , further comprising:
a gate dielectric layer disposed on the second III-V compound layer, wherein the second moat is filled with the gate dielectric layer and the gate electrode.
12. The HEMT of claim 1 , further comprising:
a third moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first moat and the source electrode in the first direction; and
a fourth moat at least partially disposed in the second III-V compound layer and at least partially disposed between the second moat and the drain electrode in the first direction.
13. The HEMT of claim 12 , wherein the third moat and the fourth moat are separated from each other.
14. The HEMT of claim 12 , wherein the third moat and the fourth moat are connected to each other.
15. The HEMT of claim 14 , wherein a second moat structure comprising the third moat and the fourth moat surrounds the first moat, the second moat and the first region of the second III-V compound layer.
16. The HEMT of claim 12 , wherein a part of the gate electrode is disposed in the third moat.
17. The HEMT of claim 16 , wherein the gate electrode overlaps a part of the second III-V compound layer disposed between the third moat and the source electrode.
18. The HEMT of claim 12 , wherein a part of the gate electrode is disposed in the fourth moat.
19. The HEMT of claim 18 , wherein the gate electrode overlaps a part of the second III-V compound layer disposed between the fourth moat and the drain electrode.
20. The HEMT of claim 1 , further comprising:
an auxiliary electrode disposed on a part of the second III-V compound layer disposed between the second moat and the drain electrode, wherein the auxiliary electrode is electrically connected with the source electrode.
21. The HEMT of claim 1 , further comprising:
a cap layer disposed on the second III-V compound layer, wherein the first moat and the second moat penetrate the cap layer respectively.
22. A high electron mobility transistor (HEMT), comprising:
a first III-V compound layer;
a second III-V compound layer disposed on the first III-V compound layer, wherein the second III-V compound layer is different from the first III-V compound layer in composition;
a source electrode and a drain electrode disposed above the second III-V compound layer;
a gate electrode disposed over the second III-V compound layer located between the source electrode and the drain electrode in a first direction, wherein the second III-V compound layer comprises a first region disposed under the gate electrode;
a first moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the source electrode in the first direction;
a second moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the drain electrode in the first direction, wherein the gate electrode is partially disposed in the first moat and the second moat, and the gate electrode overlaps a part of the second III-V compound layer disposed between the second moat and the drain electrode; and
a gate dielectric layer disposed on the second III-V compound layer, wherein the second moat is filled with the gate dielectric layer and the gate electrode.
23. A high electron mobility transistor (HEMT), comprising:
a first III-V compound layer;
a second III-V compound layer disposed on the first III-V compound layer, wherein the second III-V compound layer is different from the first III-V compound layer in composition;
a source electrode and a drain electrode disposed above the second III-V compound layer;
a gate electrode disposed over the second III-V compound layer located between the source electrode and the drain electrode in a first direction, wherein the second III-V compound layer comprises a first region disposed under the gate electrode;
a first moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the source electrode in the first direction;
a second moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the drain electrode in the first direction;
a third moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first moat and the source electrode in the first direction; and
a fourth moat at least partially disposed in the second III-V compound layer and at least partially disposed between the second moat and the drain electrode in the first direction.
24. A high electron mobility transistor (HEMT), comprising:
a first III-V compound layer;
a second III-V compound layer disposed on the first III-V compound layer, wherein the second III-V compound layer is different from the first III-V compound layer in composition;
a source electrode and a drain electrode disposed above the second III-V compound layer;
a gate electrode disposed over the second III-V compound layer located between the source electrode and the drain electrode in a first direction, wherein the second III-V compound layer comprises a first region disposed under the gate electrode;
a first moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the source electrode in the first direction;
a second moat at least partially disposed in the second III-V compound layer and at least partially disposed between the first region and the drain electrode in the first direction; and
an auxiliary electrode disposed on a part of the second III-V compound layer disposed between the second moat and the drain electrode, wherein the auxiliary electrode is electrically connected with the source electrode.