Radio frequency signal synthesizer circuit and method for generating a radio frequency signal
A radio frequency signal synthesizer circuit includes a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal and a controlled oscillator to generate the clock signal. The controlled oscillator is configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.
1. A radio frequency signal synthesizer circuit, comprising:
a digital to analog converter configured to generate an analog output signal for each clock cycle of a clock signal to provide the radio frequency signal; and
a controlled oscillator to generate the clock signal, the controlled oscillator configured to vary a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or to maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.
2. The radio frequency signal synthesizer circuit of claim 1 , wherein the second frequency range is lower than the first frequency range.
3. The radio frequency signal synthesizer circuit of claim 1 , wherein the digital to analog converter is configured to output a single amplitude value for a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.
4. The radio frequency signal synthesizer circuit of claim 1 , wherein the digital to analog converter is configured to output one of multiple samples of a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.
5. The radio frequency signal synthesizer circuit of claim 1 , wherein the controlled oscillator is capable of providing a maximum frequency; and
wherein the first frequency range of the first operation mode ranges up to the maximum frequency and wherein the second frequency range of the second operation mode ranges up to 50% of the maximum frequency.
6. The radio frequency signal synthesizer circuit of claim 1 , further comprising:
a polar representation circuit configured to generate an amplitude value and a phase value of a base band signal for each clock cycle of the radio frequency signal.
7. The radio frequency signal synthesizer circuit of claim 1 , further comprising:
an I/Q representation circuit configured to generate an In-Phase component and a Quadrature component of a base band signal; and
a mixer circuit configured to combine the In-Phase and the Quadrature component of the base band signal to provide a digital representation of the radio frequency signal as an input to the digital to analog converter.
8. The radio frequency signal synthesizer circuit of claim 7 , wherein the mixer circuit is further configured to upmix the baseband signal to the second frequency range, wherein an operating frequency of the digital to analog converter is within the second frequency range.
9. The radio frequency signal synthesizer circuit of claim 1 , wherein the digital to analog converter is further configured to operate in a third operation mode for a third frequency range in which an In-Phase component of the radio frequency signal is generated in a first clock cycle of the clock signal and in which a Quadrature-component of the radio frequency signal is generated in a subsequent second clock cycle of the clock signal.
10. The radio frequency signal synthesizer circuit of claim 1 , wherein the second frequency range is contained within the interval starting at 0.1 GHz and ending at 1 GHz; and wherein the first frequency range is contained within the interval starting at 3.0 GHz and ending at 3.9 GHz.
11. The radio frequency signal synthesizer of claim 9 , wherein the third frequency range comprises a frequency of 50% of a maximum frequency of the controlled oscillator.
12. The radio frequency signal synthesizer of claim 9 , wherein the third frequency range is at least partly contained within the interval starting at 1.3 GHz and ending at 1.7 GHz.
13. The radio frequency signal synthesizer circuit of claim 1 , wherein the first frequency range comprises one of the bands 42 and 43; and wherein the second frequency range comprises one of the bands 5, 6, 8, 12, 13, 14, 17, 18, 19, 20, 26, 27, 28, 44 according to the 3GPP Standard.
14. A method for generating a radio frequency signal, comprising:
generating an analog output signal for each clock cycle of a clock signal using an digital to analog converter to provide the radio frequency signal; and
varying a cycle time of the clock signal for a radio frequency signal in a first frequency range in a first operation mode or maintain a constant cycle time for a radio frequency signal in a second frequency range in a second operation mode, the second frequency range being different than the first frequency range.
15. The method of claim 14 , wherein the second frequency range is lower than the first frequency range.
16. The method of claim 14 , comprising using the digital to analog converter to output a single amplitude value for a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.
17. The method of claim 14 , comprising using the digital to analog converter to output one of multiple samples of a full cycle of the radio frequency signal at a time instant given by the clock cycle of the clock signal.
18. The method of claim 14 , comprising:
operating the digital to analog converter in the first operation mode in a first frequency range ranging up to a maximum frequency supported by the controlled oscillator and in the second operation mode in a second frequency range ranging up to 50% of the maximum frequency.
19. The method of claim 14 , further comprising:
generating an amplitude value and a phase value of a base band signal for each clock cycle of the radio frequency signal.
20. The method of claim 14 , further comprising:
generating an In-Phase component and a Quadrature component of a base band signal; and
combining the In-Phase and the Quadrature component of the base band signal to provide a digital representation of the radio frequency signal as an input to the digital to analog converter.
21. The method of claim 14 , further comprising: operating the digital to analog converter in a third operation mode to generate an In-Phase component of the radio frequency signal in a first clock cycle of the clock signal and to generate a Quadrature-component of the radio frequency signal in a subsequent second clock cycle of the clock signal.
22. A method for generating a radio frequency signal, comprising:
in a first operation mode, varying a cycle time of a clock signal to generate a radio frequency signal in a first frequency range;
generate an analog output signal for each clock cycle of the clock signal using an digital to analog converter;
changing the frequency range for the radio frequency signal to a second frequency range, the second frequency range being different than the first frequency range;
in a second operation mode, maintain a constant cycle time of the clock signal to generate the radio frequency signal in the second frequency range; and
generate an analog output signal for each clock cycle of the clock signal using the digital to analog converter.
23. The method of claim 22 , wherein the second frequency range has a mean frequency of less than 30% of a mean frequency of the first frequency range.
24. A Mobile telecommunications device comprising a transmitter circuit, the transmitter circuit comprising:
a radio frequency signal synthesizer circuit according to claim 1 ; and
a power amplifier configured to amplify the radio frequency signal.