IP Library Granted Patent US 10,185,336
Granted Patent B2
US 10,185,336 · App. 15/610,749 · Granted Jan 22, 2019

Receiver and method for controller receiver

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Quick Facts
Patent No.
US 10,185,336
App. No.
15/610,749
Granted
Jan 22, 2019
Kind
B2
Abstract

A receiver includes a bias current source, a comparator and an output circuit. The bias current source is powered by a first voltage source, and generates a bias current according to a second voltage source. The first voltage source is higher than the second voltage source. The comparator, coupled to the bias current source, compares two input signals to generate a comparison signal according to the bias current. The output circuit is powered by the second voltage source, and generates an output signal according to the comparison signal. The output signal and the second voltage source belong to the same power domain.

Claims (37)

1. A receiver, comprising:

a bias current source, powered by a first voltage source, generating a bias current according to a second voltage source, wherein the first voltage source is higher than the second voltage source;

a comparator, coupled to the bias current source, comparing two input signals to generate a comparison signal according to the bias current; and

an output circuit, coupled to the comparator, powered by the second voltage source to generate an output signal according to the comparison signal, wherein the output signal and the second voltage source belong to a same power domain,

wherein the two signals received by the comparator are respectively an input signal from an external circuit and a reference voltage, and

wherein the comparison signal has a common mode voltage, and the reference voltage is equal to the common mode voltage.

2. The receiver according to claim 1 , wherein a current value of the bias current is unaffected by the first voltage source.

3. The receiver according to claim 1 , wherein the bias current source comprises:

a transistor;

a resistor, having a first node coupled to a source of the transistor and a second node coupled to a third voltage source;

an operational amplifier, comprising a first input end, a second input end and an output end, wherein the first input end receives a signal associated with the second voltage source, the second input end is coupled to the first node of the resistor, and the output end is coupled to a gate of the transistor; and

a current mirror, powered by the first voltage source, duplicating a current passing the transistor to generate the bias current.

4. The receiver according to claim 3 , wherein the third voltage source is a ground voltage source.

5. The receiver according to claim 3 , wherein the signal associated with the second voltage source is generated from voltage dividing the second voltage source.

6. The receiver according to claim 3 , wherein the signal associated with the second voltage source has an associated voltage value, the resistor is a first resistor, and the comparator comprises:

a first transistor, comprising a gate, a first electrode and a second electrode, the gate receiving one of the two input signal, and the first electrode receiving the bias current;

a second transistor, comprising a gate, a first electrode and a second electrode, the gate receiving the other of the two input signals, and the first electrode receiving the bias current;

a second resistor, coupled between the second electrode of the first transistor and the third voltage source; and

a third resistor, coupled between the second electrode of the second transistor and the third voltage source;

wherein, the resistor has a first resistance value, the second resistor and the third resistor have a second resistor value, a multiple relationship between the second resistance value and the first resistance value is equal to a multiple relationship between a voltage value of the second voltage source and the associated voltage value.

7. The receiver according to claim 1 , wherein the first voltage source is a supply voltage of an analog circuit, and the second voltage source is a supply voltage of a digital circuit.

8. The receiver according to claim 1 , wherein the two signals received by the comparator are a pair of differential signals.

9. The receiver according to claim 8 , wherein the comparator is a first comparator, the comparison signal is a first comparison signal, and the output signal is a first output signal, the receiver further comprising:

a second comparator, coupled to the bias circuit, comparing the two input signals to generate a second comparison signal according to the bias current; and

a second output circuit, powered by the second voltage source to generate a second output signal according to the second comparison signal.

10. A method for controlling a receiver, comprising:

generating a bias current according to a second voltage source by a bias current source powered by a first voltage source, wherein the first voltage source is higher than the second voltage source;

comparing two input signals by a comparator to generate a comparison signal according to the bias current; and

generating an output signal according to the comparison signal by an output circuit powered by the second voltage source, wherein the output signal and the second voltage source belong to a same power domain,

wherein the two input signals are respectively an input signal from an external circuit and a reference voltage, and

wherein the comparison signal has a common mode voltage, and the reference voltage is equal to the common mode voltage.

11. The method according to claim 10 , wherein a current value of the bias current source is unaffected by the first voltage source.

12. The method according to claim 10 , wherein the first voltage source is a supply voltage of an analog circuit, and the second voltage source is a supply voltage of a digital circuit.

13. The method according to claim 10 , wherein the two input signals are a pair of differential signals.

14. The method according to claim 13 , wherein the comparison signal is a first comparison signal, and the output signal is a first output signal, the method further comprising:

comparing the two input signals to generate a second comparison signal according to the bias current; and

generating a second output signal according to the second comparison signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 056593/0167 →
MERGER Recorded Oct 8, 2019
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 050665/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2017
From: CHEN, CHUN-CHIA; SHIU, JIAN-FENG; LIU, CHIA-CHI
To: MSTAR SEMICONDUCTOR, INC.
Reel/Frame 042566/0127 →