IP Library Granted Patent US 10,551,704
Granted Patent B2
US 10,551,704 · App. 15/615,834 · Granted Feb 4, 2020

Active matrix substrate method of manufacturing active matrix substrate, and display device

Inventors: Eri Matsuo (Tokyo, JP); Tomoatsu Kinoshita (Tokyo, JP); Motohiro Toyota (Tokyo, JP); Yasunobu Hiromasu (Tokyo, JP)
Assignee: JOLED INC.
G02F1/136286H01L24/24H01L24/82H01L24/83H01L27/124H01L27/1262
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Quick Facts
Patent No.
US 10,551,704
App. No.
15/615,834
Granted
Feb 4, 2020
Kind
B2
Abstract

Provided is an active matrix substrate that includes a substrate, a thin film transistor, an electrode layer, and a second insulating film. The thin film transistor is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes. The oxide semiconductor layer includes a first region as a channel region. The electrode layer is level with the gate electrode, is provided in a different region from the thin film transistor, and includes a first end. The second insulating film is provided between the substrate and the electrode layer and includes a second end at a more retreated position than the first end of the electrode layer. The oxide semiconductor layer further includes a second region having lower resistance than the first region. The electrode layer is electrically coupled, at the first end, to the second region of the oxide semiconductor layer.

Claims (24)

1. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

the electrode layer directly contacts both a top surface of the second insulating film and a side surface of the second insulating film.

2. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

a bottom-most surface of the electrode layer is closer to the substrate than a top-most surface of the second insulating film.

3. An active matrix substrate, comprising:

a substrate;

a thin film transistor that is provided on the substrate and includes an oxide semiconductor layer, a gate electrode, and source and drain electrodes, the oxide semiconductor layer including a first region as a channel region, the gate electrode being disposed in confronted relation with the first region of the oxide semiconductor layer with a first insulating film in between, and the source and drain electrodes being electrically coupled to the oxide semiconductor layer;

an electrode layer in a different region from the thin film transistor, and includes a first end adjacent to the thin film transistor; and

a second insulating film that is provided between the substrate and the electrode layer and includes a second end adjacent to the thin film transistor, wherein the second end is farther from the thin film transistor than the first end of the electrode layer,

the oxide semiconductor layer further including a second region having lower resistance than the first region, and

the electrode layer being electrically coupled, at the first end, to the second region of the oxide semiconductor layer, wherein

the electrode layer directly contacts the second region.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2017
From: MATSUO, ERI; KINOSHITA, TOMOATSU; TOYOTA, MOTOHIRO; HIROMASU, YASUNOBU
To: JOLED INC.
Reel/Frame 042706/0202 →