IP Library Granted Patent US 10,664,283
Granted Patent B2
US 10,664,283 · App. 15/620,353 · Granted May 26, 2020

Computing system and controller thereof

Inventors: Kaiyuan Guo (Beijing, CN); Song Yao (Beijing, CN)
Assignee: BEIJING DEEPHI TECHNOLOGY CO., LTD.
G06F9/3838G06F9/3857
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Quick Facts
Patent No.
US 10,664,283
App. No.
15/620,353
Granted
May 26, 2020
Kind
B2
Abstract

Computing system and controller thereof are disclosed for ensuring the correct logical relationship between multiple instructions during their parallel execution. The computing system comprises: a plurality of functional modules each performing a respective function in response to an instruction for the given functional module; and a controller for determining whether or not to send an instruction to a corresponding functional module according to dependency relationship between the plurality of instructions.

Claims (80)

1. A computing system comprising:

a plurality of functional modules, each performing a respective function in response to an instruction for a given functional module; and

a controller for determining whether to send an instruction to a corresponding functional module according to dependency relationships among a plurality of instructions,

wherein, when received by the controller, the instruction has a format that the controller can use to recognize dependency between the instruction and a preceding instruction, and the controller send the instruction to its corresponding functional module if the preceding instruction on which the instruction depends has been completed;

wherein the controller comprises:

a plurality of instruction queue buffers, each corresponding to a respective functional module, and being used for storing an instruction queue for the given functional module, for providing instructions to be executed to the functional module in turn, and

an instruction scheduling module for determining whether operation of the preceding instruction on which a following instruction depends has been completed and, when it is determined that the operation of the preceding instruction has been completed, storing the following instruction in a tail of the corresponding instruction queue;

wherein the instruction scheduling module acquires sequence numbers of current instructions being executed by each of the plurality of functional modules from the given functional module;

wherein the instruction scheduling module comprises:

a plurality of comparators, each for comparing the sequence numbers of the current instructions being executed by the respective one of the plurality of functional modules with the sequence number of the preceding instruction on which the instruction currently processed by the instruction scheduling module depends, and

a logic gate, when comparison results of all comparators indicate that the sequence numbers of the current instructions are greater than the sequence number of the preceding instruction, issuing a completion signal to indicate that the operation of the preceding instruction has been completed.

2. The computing system of claim 1 , wherein, the controller further comprising:

a control signal generating module for sequentially generating a corresponding control signal based on the instructions in the instruction queue buffer and transmitting the control signal to the corresponding functional module of the instruction queue buffer.

3. The computing system of claim 1 , wherein

the instructions are divided into a plurality of types, each corresponding to a respective functional module;

the instructions comprising an instruction type field for indicating the type of the instruction, and an instruction dependency field for indicating the preceding instruction on which the instruction depends,

the controller further comprising:

an instruction decoding module for recognizing the type of the instruction and the preceding instruction on which it depends, from the instruction type field and the instruction dependency field, respectively.

4. The computing system of claim 3 , wherein,

the instruction dependency field being set based on difference between a sequence number of the instruction and a sequence number of the preceding instruction on which it depends,

the instruction scheduling module further comprising:

a subtractor for determining the sequence number of the preceding instruction on which a current instruction depends, based on the sequence number of the current instruction and data of the instruction dependency field.

5. The computing system of claim 4 , wherein,

the plurality of functional modules including a first functional module and a second functional module, each corresponding to a first type instruction and a second type instruction, respectively,

a buffer is provided between the first functional module and the second functional module,

the first functional module writes its operation result to a specified location specified by an instruction parameter of the first type instruction on the buffer, the second functional module reads the data from a specified location specified by the instruction parameter of the second type instruction on the buffer,

the first type instruction relies on a preceding second type instruction that reads data from its specified location,

the second type instruction relies on a preceding first type instruction that writes operation result to its specified location.

6. The computing system of claim 5 , wherein,

the plurality of functional modules including a data input module, a computing module and a data output module, to execute data input instructions, computing instructions and data output instructions, respectively;

an input buffer is arranged between the data input module and the computing module,

an output buffer is arranged between the data output module and the computing module,

the data input module writes data that is read from an external storage into the input buffer,

the computing module reads the data from the input buffer, performs the computation, and writes a computation result into the output buffer,

the data output module reads the data in the output buffer and writes the data to the external storage,

the data input instruction relies on a preceding computing instruction that reads data from its specified location,

a computing instruction relies on a preceding data input instruction that writes data to its specified location,

a data output instruction relies on the preceding computing instruction that writes the computation result to its specified location.

7. The computing system of claim 6 , wherein, the computing system is a computing system for Convolution Neural Network computation,

the data input module inputs input data of a plurality of input channels,

the computing module performs CNN computation on the input data of a plurality of input channels to obtain output data of a plurality of output channels, and

the data output module outputs the output data of the plurality of output channels.

8. The computing system of claim 1 , further comprising:

a host computer for transmitting the instructions to the controller.

9. A controller for scheduling instructions for a computing system, the computing system comprising a plurality of functional modules, each functional module executing a respective function in response to an instruction for a given functional module, and the controller determining whether to send an instruction to a corresponding functional module according to dependency relationships among a plurality of instructions,

wherein the controller comprises:

a plurality of instruction queue buffers, each corresponding to a respective functional module, and being used for storing an instruction queue for the given functional module, for providing instructions to be executed to the functional module in turn;

an instruction scheduling module for determining whether operation of a preceding instruction on which a following instruction depends has been completed and, when it is determined that the operation of the preceding instruction has been completed, storing the following instruction in a tail of the corresponding instruction queue;

wherein, when received by the controller, the instruction has a format that the controller can use to recognize dependency between the instruction and the preceding instruction;

wherein the instruction scheduling module acquires sequence numbers of current instructions being executed by each of the plurality of functional modules from the given functional module;

wherein the instruction scheduling module comprises:

a plurality of comparators, each for comparing the sequence numbers of the current instructions being executed by the respective one of the plurality of functional modules with a sequence number of the preceding instruction on which the instruction currently processed by the instruction scheduling module depends, and

a logic gate, when comparison results of all comparators indicate that the sequence numbers of the current instructions are greater than the sequence number of the preceding instruction, issuing a completion signal to indicate that the operation of the preceding instruction has been completed.

10. The controller of claim 9 , further comprising:

a control signal generating module for sequentially generating a corresponding control signal based on the instructions in the instruction queue buffer and transmitting the control signal to the corresponding functional module of the instruction queue buffer.

11. The controller of claim 9 , wherein

the instructions are divided into a plurality of types, each corresponding to a respective functional module;

the instructions comprising an instruction type field for indicating the type of the instruction, and an instruction dependency field for indicating the preceding instruction on which the instruction depends,

the controller further comprising:

an instruction decoding module for recognizing the type of the instruction and the preceding instruction on which it depends, from the instruction type field and the instruction dependency field, respectively.

12. The controller of claim 11 , wherein,

the instruction dependency field being set based on difference between a sequence number of the instruction and a sequence number of the preceding instruction on which it depends,

the instruction scheduling module further comprising:

a subtractor for determining the sequence number of the preceding instruction on which a current instruction depends, based on the sequence number of the current instruction and data of the instruction dependency field.

13. The controller of claim 11 , wherein,

the plurality of functional modules including a first functional module and a second functional module, each corresponding to a first type instruction and a second type instruction, respectively,

a buffer is provided between the first functional module and the second functional module,

the first functional module writes its operation result to a specified location specified by an instruction parameter of the first type instruction on the buffer, the second functional module reads data from a specified location specified by the instruction parameter of the second type instruction on the buffer,

the first type instruction relies on a preceding second type instruction that reads data from its specified location,

the second type instruction relies on a preceding first type instruction that writes operation result to its specified location.

14. The controller of claim 13 , wherein,

the plurality of functional modules including a data input module, a computing module and a data output module, to execute data input instructions, computing instructions and data output instructions, respectively;

an input buffer is arranged between the data input module and the computing module,

an output buffer is arranged between the data output module and the computing module,

the data input module writes data that is read from an external storage into the input buffer,

the computing module reads the data from the input buffer, performs the computation, and writes a computation result into the output buffer,

the data output module reads the data in the output buffer and writes the data to the external storage,

the data input instruction relies on a preceding computing instruction that reads data from its specified location,

the computing instruction relies on a preceding data input instruction that writes data to its specified location,

the data output instruction relies on the preceding computing instruction that writes the computation result to its specified location.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2020
From: BEIJING DEEPHI INTELLIGENT TECHNOLOGY CO., LTD.
To: XILINX TECHNOLOGY BEIJING LIMITED
Reel/Frame 053581/0037 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2018
From: BEIJING DEEPHI TECHNOLOGY CO., LTD.
To: BEIJING DEEPHI INTELLIGENT TECHNOLOGY CO., LTD.
Reel/Frame 045906/0478 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 042679 FRAME 0183. ASSIGNOR(S) HEREBY CONFIRMS THE APPLICATION. Recorded Mar 19, 2018
From: GUO, KAIYUAN; YAO, SONG
To: BEIJING DEEPHI TECHNOLOGY CO., LTD.
Reel/Frame 045631/0021 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2017
From: GUO, KAIYUAN; YAO, SONG
To: DEEPHI TECHNOLOGY CO., LTD.
Reel/Frame 042679/0183 →
Priority Claims (1)
CN 2016 1 0543291 · Jul 11, 2016 · national
Continuity (1)
Related Publication 20180011710A1 · Jan 11, 2018