IP Library Granted Patent US 10,009,195
Granted Patent B2
US 10,009,195 · App. 15/625,084 · Granted Jun 26, 2018

Nonlinear equalizer

Inventors: Thang Pham (Sunnyvale, CA); Chengpin Yu (Mountain View, CA)
Assignee: Finisar Corporation
H04L25/03063H04B10/5161H04B10/58H04B10/40
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Quick Facts
Patent No.
US 10,009,195
App. No.
15/625,084
Granted
Jun 26, 2018
Kind
B2
Abstract

An equalizer and method is implemented to improve the performance of a communication system based on multi-level amplitude modulation schemes. The equalizer may include a linear equalization circuit including a plurality of time delayed taps and configured to receive an input signal and generate an output signal. The equalizer may further include a nonlinear circuit configured to receive signals from at least a portion of the time delayed taps and generate at least a portion of a difference between the signals, the output signal based at least in part on the difference.

Claims (30)

1. A nonlinear equalizer, comprising:

a linear equalizer circuit including a plurality of time delayed taps and configured to receive an input signal and generate an output signal; and

a nonlinear circuit configured to receive signals from at least a portion of the time delayed taps and generate at least a portion of a difference between the signals, the output signal based at least in part on the difference.

2. The nonlinear equalizer of claim 1 , wherein the nonlinear circuit is configured to determine the difference and provide the difference to the linear equalizer for summing with each of the outputs of the plurality of time delayed taps.

3. The nonlinear equalizer of claim 2 , further including a direction function configured to generate a constant based on a determination of the input signal transitioning between high and low levels.

4. The nonlinear equalizer of claim 1 , wherein the nonlinear circuit is configured to form a product of the signals of the at least a portion of the time delayed taps, the product provided to the linear equalizer for summing with each of the outputs of the plurality of time delayed taps.

5. The nonlinear equalizer of claim 4 , wherein the product is formed according to a Volterra model.

6. The nonlinear equalizer of claim 1 , wherein the nonlinear circuit is configured to:

determine the difference and provide the difference to the linear equalizer for summing with each of the outputs of the plurality of time delayed taps; and

form a product of the signals of the at least a portion of the time delayed taps, the product provided to the linear equalizer for summing with each of the outputs of the plurality of time delayed taps.

7. The nonlinear equalizer of claim 1 , wherein the delayed taps are fractionally spaced to a value less than or equal to one period.

8. The nonlinear equalizer of claim 1 , wherein the plurality of time delayed taps includes seven time delayed taps.

9. A method, comprising:

linearly equalizing a plurality of time delayed taps including receiving an input signal and generating an output signal; and

nonlinearly equalizing signals from at least a portion of the time delayed taps and generating at least a portion of a difference between the signals, the output signal based at least in part on the difference.

10. The method of claim 9 , wherein the nonlinearly equalizing including determining the difference and the linearly equalizing including summing the difference with each of the outputs of the plurality of time delayed taps.

11. The method of claim 10 , further including generating a direction constant based on the input signal transitioning between high and low levels.

12. The method of claim 9 , wherein the nonlinearly equalizing includes forming a product of the signals of the at least a portion of the time delayed taps, and the linearly equalizing includes summing the difference with each of the outputs of the plurality of time delayed taps.

13. The method of claim 12 , wherein the product is formed according to a Volterra model.

14. The method of claim 9 , wherein the nonlinearly equalizing includes:

determining the difference for summing with each of the outputs of the plurality of time delayed taps; and

forming a product of the signals of the at least a portion of the time delayed taps and providing, the product for summing with each of the outputs of the plurality of time delayed taps.

15. The method of claim 9 , wherein the delayed taps are fractionally spaced to a value less than or equal to one period.

16. The method of claim 9 , wherein the plurality of time delayed taps includes seven time delayed taps.

17. A nonlinear equalizer, comprising:

means for linearly equalizing a plurality of time delayed taps including receiving an input signal and generating an output signal; and

means for nonlinearly equalizing signals from at least a portion of the time delayed taps and generating at least a portion of a difference between the signals, the output signal based at least in part on the difference.

18. The nonlinear equalizer of claim 17 , wherein the means for nonlinearly equalizing includes means for determining the difference and the means for linearly equalizing includes summing the difference with each of the outputs of the plurality of time delayed taps.

19. The nonlinear equalizer of claim 18 , further including means for generating a direction constant based on the input signal transitioning between high and low levels.

20. The nonlinear equalizer of claim 17 , wherein the means for nonlinearly equalizing includes means for forming a product of the signals of the at least a portion of the time delayed taps, and the means for linearly equalizing includes means for summing the difference with each of the outputs of the plurality of time delayed taps.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2017
From: PHAM, THANG; YU, CHENGPIN
To: FINISAR CORPORATION
Reel/Frame 042732/0347 →
Continuity (2)
Provisional Application 62350860 · Jun 16, 2016
Related Publication 20170366375A1 · Dec 21, 2017