IP Library Granted Patent US 10,630,067
Granted Patent B2
US 10,630,067 · App. 15/642,939 · Granted Apr 21, 2020

Semiconductor device and battery voltage monitoring device

Inventors: Yoshitaka Muramoto (Tokyo, JP); Junko Kimura (Tokyo, JP); Hirohiko Hayakawa (Itami, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H02H7/18G01R31/3835G01R31/396H02J7/0016H02J7/0021G01R19/16542
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Quick Facts
Patent No.
US 10,630,067
App. No.
15/642,939
Granted
Apr 21, 2020
Kind
B2
Abstract

A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage. The semiconductor device further includes an up-convert level shifter circuit which converts a low-potential-side shunt control signal based on the ground potential into a high-potential-side shunt control signal, and a switch which short-circuits the two terminals via a resistor based on the converted high-potential-side shunt control signal.

Claims (59)

1. A method of measuring voltage of each of a plurality of unit cells series-coupled in multi-stage and configuring an assembled battery, the method using at least one semiconductor device,

wherein the semiconductor device comprises:

a first terminal to be coupled to a first node which is one electrode of a unit cell and is coupled to another unit cell in the unit cells; and

a second terminal to be coupled to a second node which is the other electrode of the unit cell and is coupled to another unit cell,

wherein the method comprises:

measuring an inter-terminal voltage between the first terminal and the second terminal by a voltage measurement circuit;

converting the inter-terminal voltage into a low-potential-side inter-terminal voltage by a first level shifter circuit;

comparing the low-potential-side inter-terminal voltage with a predetermined reference voltage by a comparator circuit;

converting a low-potential-side shunt control signal into a high-potential-side shunt control signal by a second level shifter circuit; and

short-circuiting the first terminal and the second terminal via a first resistor, on the basis of the high-potential-side shunt control signal by a first switch,

wherein the semiconductor device further comprises:

a third terminal to be coupled to the first node; and

a second resistor coupled between the first terminal and the third terminal,

wherein the method further comprises:

converting a low-potential-side sense enable signal into a high-potential-side sense enable signal by a third level shifter circuit;

converting a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal by a fourth level shifter circuit; and

short-circuiting the third terminal and the second terminal, on the basis of the high-potential-side cell balance enable signal by a third switch, and

wherein the first level shifter circuit comprises:

a voltage-to-current converter circuit operable to convert the inter-terminal voltage into a current value corresponding to the inter-terminal voltage;

a current-to-voltage converter circuit operable to convert the current value into a low-potential-side inter-terminal voltage corresponding to the current value;

a second switch operable to control operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal; and

a fourth switch operable to control operation of the voltage-to-current converter circuit, on the basis of a potential of the third terminal, in parallel with the second switch.

2. The method of claim 1 , wherein

the semiconductor device further comprises

a fourth terminal to be coupled to the second node.

3. A method of monitoring battery voltage, the method using at least one battery voltage monitoring device,

wherein the device comprises:

a plurality of voltage measurement units provided for each group of a plurality of unit cells series-coupled in multi-stage for configuring an assembled battery; and

a battery system controller coupled to the voltage measurement units,

wherein each of the voltage measurement units is comprised of a semiconductor device,

wherein the semiconductor device comprises:

a first terminal to be coupled to a first node which is one electrode of a unit cell and is coupled to another unit cell in the unit cells; and

a second terminal to be coupled to a second node which is the other electrode of the unit cell and is coupled to another unit cell;

wherein the method comprises:

measuring an inter-terminal voltage between the first terminal and the second terminal by a voltage measurement circuit;

converting the inter-terminal voltage into a low-potential-side inter-terminal voltage by a first level shifter circuit;

comparing the low-potential-side inter-terminal voltage with a predetermined reference voltage by a comparator circuit;

converting a low-potential-side shunt control signal into a high-potential-side shunt control signal by a second level shifter circuit; and

short-circuiting the first terminal and the second terminal via a first resistor, on the basis of the high-potential-side shunt control signal by a first switch,

wherein the semiconductor device further comprises:

a third terminal to be coupled to the first node; and

a second resistor coupled between the first terminal and the third terminal,

wherein the method further comprises:

converting a low-potential-side sense enable signal into a high-potential-side sense enable signal by a third level shifter circuit;

converting a low-potential-side cell balance enable signal into a high-potential-side cell balance enable signal by a fourth level shifter circuit; and

short-circuiting the third terminal and the second terminal, on the basis of the high-potential-side cell balance enable signal by a third switch,

wherein the first level shifter circuit comprises:

a voltage-to-current converter circuit;

a current-to-voltage converter circuit;

a second switch; and

a fourth switch, and

wherein the method further comprises:

converting the inter-terminal voltage into a current value corresponding to the inter-terminal voltage by the voltage-to-current converter circuit;

converting the current value into a low-potential-side inter-terminal voltage corresponding to the current value by the current-to-voltage converter circuit;

controlling operation of the voltage-to-current converter circuit, on the basis of the high-potential-side sense enable signal by the second switch; and

controlling operation of the voltage-to-current converter circuit by the fourth switch, on the basis of a potential of the third terminal, in parallel with the second switch.

4. The method of claim 3 , wherein

the semiconductor device further comprises

a fourth terminal to be coupled to the second node.

Assignments (2)
CHANGE OF ADDRESS OF ASSIGNEE Recorded Jun 1, 2018
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045984/0759 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2018
From: MURAMOTO, YOSHITAKA; KIMURA, JUNKO; HAYAKAWA, HIROHIKO
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045776/0595 →
Priority Claims (1)
JP 2012-185120 · Aug 24, 2012 · national
Continuity (2)
Continuation 13968635 · Aug 16, 2013
Related Publication 20170302069A1 · Oct 19, 2017