Method and structure of MEMS PLCSP fabrication
A method and structure for a PLCSP (Package Level Chip Scale Package) MEMS package. The method includes providing a MEMS chip having a CMOS substrate and a MEMS cap housing at least a MEMS device disposed upon the CMOS substrate. The MEMS chip is flipped and oriented on a packaging substrate such that the MEMS cap is disposed above a thinner region of the packaging substrate and the CMOS substrate is bonding to the packaging substrate at a thicker region, wherein bonding regions on each of the substrates are coupled. The device is sawed to form a package-level chip scale MEMS package.
1. A method for forming a package-level chip scale MEMS package comprising:
providing a MEMS chip comprising a CMOS substrate having a top surface having a first portion and a second portion and comprising a MEMS cap disposed upon the first portion of the CMOS substrate, wherein the CMOS substrate is associated with a first thickness, wherein the MEMS cap is associated with a second thickness, wherein the MEMS cap and the first portion of the top surface form an enclosed cavity, wherein at least a MEMS device is formed on the first portion of the top surface and disposed within the enclosed cavity, wherein the second portion of the top surface of the CMOS substrate is substantially free of the cap and includes at least a first bonding region;
providing a packaging substrate having a first substrate region including a top surface having a first portion and a second portion, wherein the first portion is characterized by a third thickness, wherein the second portion is characterized by a fourth thickness, wherein the third thickness exceeds the fourth thickness by at least the second thickness associated with the cap, wherein the first portion of the top surface of the packaging substrate includes at least a second bonding region;
orienting the MEMS chip relative to the packaging substrate such that the second portion of the top surface of the CMOS substrate is opposed to the first portion of the top surface of the packaging substrate, and such that the MEMS cap is disposed above the second portion of the top surface of the packaging substrate;
disposing an adhesive material between the MEMS cap and the second portion of the top surface of the packaging substrate;
bonding the MEMS cap and the second portion of the top surface of the packaging substrate using the adhesive material;
bonding the first bonding region to the second bonding region; and
separating the first substrate region of the packaging substrate away from a second substrate region, wherein the first substrate region forms the package-level chip scale MEMS package.
2. The method of claim 1 wherein the adhesive material comprises two or more separate adhesive regions.
3. The method of claim 2 wherein the two or more separate adhesive regions comprise four adhesive regions, wherein each adhesive region is disposed approximately at corners of the MEMS cap.
4. The method of claim 1 wherein a plurality of land grid array contacts are disposed upon a bottom surface of the first substrate region.
5. The method of claim 1 further comprising:
forming a first plurality of electrical contacts upon the first bonding region;
wherein a second plurality of electrical contacts are disposed upon the second bonding region; and
wherein bonding the first bonding region to the second bonding region comprises coupling the first plurality of electrical contacts to the second plurality of electrical contacts.
6. The method of claim 1 wherein the package-level chip scale MEMS package is substantially free of an encapsulation material when separated from the second substrate region.
7. The method of claim 1 wherein the separating the first substrate region of the packing substrate comprises using a package saw to separate the first substrate region of the second substrate region from the second substrate region to form the package-level chip scale MEMS package.
8. The method of claim 1
wherein the top surface of the CMOS substrate also includes a third portion, and wherein third portion of the top surface of the CMOS substrate is substantially free of the MEMS cap and includes at least a third bonding region;
wherein the top surface of the packing substrate also includes a third portion, wherein the third portion is characterized by the third thickness, and wherein the third portion of the top surface of the packaging substrate includes at least a fourth bonding region;
wherein the orienting the MEMS chip relative to the packaging substrate further comprises orienting the MEMS chip relative to the packing substrate such that the third portion of the top surface of the CMOS substrate is opposed to the third portion of the top surface of the packaging substrate; and
wherein the method further comprising bonding the third bonding region to the fourth bonding region.
9. The method of claim 1 wherein the second portion of the top surface of the first substrate region is characterized by a first area;
wherein the MEMS chip is characterized by a second area; and
wherein the first area is larger than the second area within a range of about 40% to about 50%.
10. The method of claim 1 wherein the MEMS device is selected from a group consisting of: an accelerometer, a gyroscope, a magnetometer, a pressure sensor.
11. A package-level chip scale MEMS packaged device comprising:
a MEMS chip comprising a CMOS substrate having a top surface having a first portion and a second portion and comprising a MEMS cap disposed upon the first portion of the CMOS substrate, wherein the CMOS substrate is associated with a first thickness, wherein the MEMS cap is associated with a second thickness, wherein the MEMS cap and the first portion of the top surface form an enclosed cavity, wherein at least a MEMS device is formed on the first portion of the top surface and disposed within the enclosed cavity, wherein the second portion of the top surface of the CMOS substrate is substantially free of the cap and includes at least a first bonding region;
a packaging substrate having a top surface, the top surface having a first portion and a second portion, wherein the first portion is characterized by a third thickness, wherein the second portion is characterized by a fourth thickness, wherein the third thickness exceeds the fourth thickness by at least the second thickness associated with the cap, wherein the first portion of the top surface of the packaging substrate includes at least a second bonding region;
an adhesive material disposed between the MEMS cap and the second portion of the top surface of the packaging substrate;
wherein the MEMS chip is oriented relative to the packaging substrate such that the second portion of the top surface of the CMOS substrate is opposed to the first portion of the top surface of the packaging substrate, and such that the MEMS cap is disposed above the second portion of the top surface of the packaging substrate; and
wherein the first bonding region is bonded to the second bonding region.
12. The device of claim 11 wherein the adhesive material comprises two or more separate adhesive regions.
13. The device of claim 12 wherein the two or more separate adhesive regions comprise four adhesive regions, wherein each adhesive region is disposed approximately at a corner of the MES cap.
14. The device of claim 11 wherein the packaging substrate comprises a bottom surface having a plurality of land grid array contacts disposed thereon.
15. The device of claim 11
wherein the first bonding region comprises a first plurality of electrical contacts;
wherein the second bonding region comprises a second plurality of electrical contacts; and
wherein the first plurality of electrical contacts are coupled to the second plurality of electrical contacts.
16. The device of claim 11 wherein the package-level chip scale MEMS packaged device is substantially free of an encapsulation.
17. The device of claim 11
wherein the top surface of the CMOS substrate also includes a third portion, and wherein third portion of the top surface of the CMOS substrate is substantially free of the MEMS cap and includes at least a third bonding region;
wherein the top surface of the packing substrate also includes a third portion, wherein the third portion is characterized by the third thickness, and wherein the third portion of the top surface of the packaging substrate includes at least a fourth bonding region;
wherein the MEMS chip is oriented relative to the packing substrate such that the third portion of the top surface of the CMOS substrate is opposed to the third portion of the top surface of the packaging substrate; and
wherein the third bonding region is bonded to the fourth bonding region.
18. The device of claim 11
wherein the second portion of the top surface of the first substrate region is characterized by a first area;
wherein the MEMS chip is characterized by a second area; and
wherein the first area is larger than the second area within a range of about 40% to about 50%.
19. The device of claim 11 wherein the MEMS device is selected from a group consisting of: an accelerometer, a gyroscope, a magnetometer, a pressure sensor.
20. The device of claim 11 wherein the second bonding region comprises a pre-solder bump.