Comparator, AD converter, semiconductor integrated circuit, and rotation detector
Provided is a comparator configured to compare input voltages, which are input to a first dynamic comparator and a second dynamic comparator, with a reference voltage, select either an output signal of the first dynamic comparator or an output signal of the second dynamic comparator based on the comparison result, output the selected output signal, and control clock signals, which are input to the first dynamic comparator and the second dynamic comparator respectively, based on the comparison result, so as to stop the operation of the dynamic comparator of which output signal is not selected.
1. A comparator comprising:
a first dynamic comparator which includes an NMOS differential input stage, and is configured to perform a comparison operation in synchronization with a clock signal, which is input thereto, and to output an output signal;
a second dynamic comparator which includes a PMOS differential input stage, and is configured to perform a comparison operation in synchronization with a clock signal which is input thereto, and to output an output signal;
an output signal selection circuit configured to compare an input voltage, which is input to the first dynamic comparator and an input voltage which is input to the second dynamic comparator, with a reference voltage, generate a comparison result signal, select the output signal received from of the first dynamic comparator or the output signal received from the second dynamic comparator based on the comparison result signal, and output the selected output signal; and
a clock input control circuit configured to receive the comparison result signal from the output signal selection circuit, and control an input of the clock signals to the first dynamic comparator and the second dynamic comparator, respectively, based on the comparison result signal, so as to stop the comparison operation of a dynamic comparator, among the first dynamic comparator and the second dynamic comparator, of which the output signal is not selected by the output signal selection circuit.
2. The comparator according to claim 1 , wherein the output signal selection circuit includes:
a resistor configured to generate the reference voltage by dividing a power supply voltage;
a selection comparator configured to compare the input voltage which is input to the first dynamic comparator and the input voltage which is input to the second dynamic comparator with the reference voltage which is generated by the resistor, and output the comparison result signal; and
a multiplexer configured to select the output signal of the first dynamic comparator or the output signal of the second dynamic comparator based on the comparison result signal which is output from the selection comparator, and output the selected output signal.
3. The comparator according to claim 2 , wherein the resistor is included into a plurality of resistors, and
the output signal selection circuit is configured to make the reference voltage variable by using different resistance values of the plurality of resistors.
4. The comparator according to claim 1 , further comparing:
a first preamplifier connected at an input terminal of the first dynamic comparator; and
a second preamplifier connected at an input terminal of the second dynamic comparator.
5. An AD converter comprising the comparator according to claim 1 .
6. A semiconductor integrated circuit comprising the AD converter according to claim 5 .
7. A rotation detector comprising the semiconductor integrated circuit according to claim 6 .