IP Library Granted Patent US 10,091,849
Granted Patent B2
US 10,091,849 · App. 15/655,025 · Granted Oct 2, 2018

Hybrid dimming for lighting circuits

Inventors: Seunguk Yang (Anyang, KR); Hyunchul Eum (Seoul, KR); Eungwoo Lee (Seoul, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H05B33/0845H05B33/0812H05B33/0815H05B33/0818
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Quick Facts
Patent No.
US 10,091,849
App. No.
15/655,025
Granted
Oct 2, 2018
Kind
B2
Abstract

A lighting circuit includes a light emitting diode (LED), a transistor that controls a current through the LED, and a controller integrated circuit (IC) that controls the transistor to vary a brightness of the LED. The controller IC has a dimming pin that receives a hybrid dimming signal from a dimming input circuit. The dimming input circuit receives pulse width modulation (PWM) dimming signals and generates the hybrid dimming signal as a PWM dimming signal, an analog dimming signal, or both depending on the received PWM dimming signals.

Claims (46)

1. A lighting circuit comprising:

a light emitting diode (LED);

a first transistor that is configured to control a current through the LED; and

a controller integrated circuit (IC) having a first pin that outputs a drive signal for controlling a switching operation of the first transistor and a second pin that receives a dimming signal, the controller IC integrated circuit being configured to adjust a brightness of the LED by controlling the first transistor based on the dimming signal; and

a dimming input circuit that receives a first pulse width modulation (PWM) dimming signal and a second PWM dimming signal, the dimming input circuit being configured to output the dimming signal as a series of pulses that controls the brightness of the LED in accordance with PWM dimming control when the second PWM dimming signal alternates between a first level and a second level, and to output the dimming signal as an analog signal that controls the brightness of the LED in accordance with analog dimming control when the second PWM dimming signal is at the second level.

2. The lighting circuit of claim 1 , wherein the dimming input circuit comprises:

a low-pass filter that is configured to low-pass filter the first PWM dimming signal to generate a filtering signal; and

a second transistor that is configured to present the filtering signal to the second pin of the controller IC when the second PWM dimming signal is at the first level, and to cut off the filtering signal from the second pin when the second PWM dimming signal is at the second level.

3. The lighting circuit of claim 2 , wherein the dimming input circuit receives the first and second PWM dimming signals from a microcontroller.

4. The lighting circuit of claim 2 , wherein the dimming input circuit further comprises a third transistor, and wherein the second PWM dimming signal controls a switching operation of the third transistor to control a switching operation of the second transistor.

5. The lighting circuit of claim 1 , wherein the first transistor comprises a MOS transistor having a drain that is connected to a cathode of the LED, a source that is connected to ground, and a gate that is connected to the first pin of the controller IC.

6. The lighting circuit of claim 5 , wherein the drain of the transistor is connected to the cathode of the LED by way of an inductor.

7. The lighting circuit of claim 1 , wherein the controller IC further comprises a third pin that receives a sense voltage indicative of the current through the LED.

8. A dimming input circuit comprising:

a first node that is configured to receive a first pulse width modulation (PWM) dimming signal;

a second node that is configured to receive a second PWM dimming signal; and

a third node that is configured to output a dimming signal for adjusting a brightness of a light emitting diode (LED),

wherein the dimming input circuit is configured to generate the dimming signal as a hybrid dimming signal for adjusting the brightness of the LED in accordance with PWM dimming control and in accordance with analog dimming control based on the first and second PWM dimming signals,

wherein the dimming input circuit is configured to generate the dimming signal as the hybrid dimming signal for adjusting the brightness of the LED in accordance with PWM dimming control when the second PWM dimming signal alternates between a first level and a second level.

9. The dimming input circuit of claim 8 , wherein the dimming input circuit is configured to generate the dimming signal as the hybrid dimming signal for adjusting the brightness of the LED in accordance with analog dimming control when the second PWM dimming signal is maintained at the second level.

10. The dimming input circuit of claim 8 , wherein the first node is configured to receive the first PWM dimming signal from a microcontroller, and the second node is configured to receive the second PWM dimming signal from the microcontroller.

11. The dimming input circuit of claim 8 , wherein the third node is configured to be connected to a dimming pin of a controller integrated circuit (IC) for controlling the brightness of the LED.

12. A method of operating a lighting circuit, the method to be performed by a dimming input circuit, the method comprising:

receiving a first pulse width modulation (PWM) dimming signal;

receiving a second PWM dimming signal;

low-pass filtering the first PWM dimming signal to generate a filtering signal;

generating a hybrid dimming signal based on the first and second PWM dimming signals by providing the filtering signal as the hybrid dimming signal based on the second PWM dimming signal; and

adjusting a brightness of a light emitting diode (LED) of the lighting circuit in accordance with the hybrid dimming signal.

13. The method of claim 12 , further comprising:

preventing the filtering signal from being provided as the hybrid dimming signal based on the second PWM dimming signal.

14. The method of claim 12 , further comprising:

receiving the first and second PWM dimming signals from a microcontroller.

15. The method of claim 12 , further comprising:

generating the hybrid dimming signal as a series of PWM pulses when the second PWM signal alternates between at a first level and a second level; and

generating the hybrid dimming signal as an analog dimming signal when the second PWM signal is maintained at the second level.

16. A dimming input circuit comprising:

a first node that is configured to receive a first pulse width modulation (PWM) dimming signal;

a second node that is configured to receive a second PWM dimming signal; and

a third node that is configured to output a dimming signal for adjusting a brightness of a light emitting diode (LED),

wherein the dimming input circuit is configured to generate the dimming signal as a hybrid dimming signal for adjusting the brightness of the LED in accordance with PWM dimming control and in accordance with analog dimming control based on the first and second PWM dimming signals,

wherein the dimming input circuit further comprises:

a low-pass filter that is configured to low-pass filter the first PWM dimming signal to generate a filtering signal; and

a first transistor that is configured to connect an output terminal of the low-pass filter to the third node and to generate the dimming signal based on the second PWM dimming signal.

17. The dimming input circuit of claim 16 , wherein the dimming input circuit further comprises:

a second transistor that is configured to control a switching operation of the first transistor based on the second PWM dimming signal.

18. The dimming input circuit of claim 16 , wherein the second PWM dimming signal turns on the first transistor to connect the filtering signal to the third node when the second PWM dimming signal is at a first level, and turns off the first transistor to cut off the filtering signal from the third node when the second PWM dimming signal is at a second level.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0460 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064075/0001 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2017
From: YANG, SEUNGUK; EUM, HYUNCHUL; LEE, EUNGWOO
To: FAIRCHILD KOREA SEMICONDUCTOR LTD.
Reel/Frame 043054/0042 →
Continuity (2)
Provisional Application 62377817 · Aug 22, 2016
Related Publication 20180054865A1 · Feb 22, 2018