Self-bypass diode function for gallium arsenide photovoltaic devices
Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
1. A semiconductor device, comprising:
a semiconductor structure including a base layer configured to absorb photons to convert light energy into electrical energy at the semiconductor device, the base layer includes a Group III-V compound semiconductor; and
wherein the semiconductor structure includes an emitter layer, the emitter layer being made of a different material than the base layer and having a higher bandgap than the base layer,
wherein a p-n junction within the semiconductor structure is formed between the emitter layer and the base layer such that under reverse-bias conditions of the device the p-n junction provides a bypass function using a Zener breakdown effect that breaks down in a controlled manner,
wherein the base layer is highly doped within a range of about 4×10 17 cm −3 to about 1×10 19 cm −3 , and a thickness of the base layer is within a range of about 300 nm to about 3,500 nm,
wherein the semiconductor structure includes an intermediate layer between the emitter layer and the base layer, and
further comprising a window layer disposed on a surface of the base layer and away from the emitter layer.
2. The semiconductor device of claim 1 , wherein the device provides the bypass function with no distinct bypass diode connected to or included in the device.
3. The semiconductor device of claim 1 , further comprising a contact layer disposed adjacent to the window layer and a metal layer disposed adjacent to the contact layer.
4. The semiconductor device of claim 1 , wherein the p-n junction is formed at a location offset from a heterojunction in the semiconductor structure by up to about 200 nm.
5. The semiconductor device of claim 4 , wherein the p-n junction being formed between the emitter layer and the intermediate layer, and the heterojunction being formed between the base layer and the intermediate layer.
6. The semiconductor device of claim 5 , wherein the intermediate layer includes a gradation in material composition, from the material of the base layer to the material of the emitter layer.
7. The semiconductor device of claim 1 , wherein the semiconductor device is a photovoltaic device.
8. The semiconductor device of claim 1 , wherein the p-n junction is a heterojunction.