IP Library Granted Patent US 10,250,238
Granted Patent B2
US 10,250,238 · App. 15/661,690 · Granted Apr 2, 2019

Signal calculator

Inventors: Taesung Kim (Seoul, KR); Seunguk Yang (Anyang, KR); Youngbae Park (Bucheon, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03K5/00G06G7/16H03K4/502H03K4/94
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Quick Facts
Patent No.
US 10,250,238
App. No.
15/661,690
Granted
Apr 2, 2019
Kind
B2
Abstract

Examples of a signal calculator include a voltage multiplier and a time divider. The voltage multiplier copies time information corresponding to a first voltage and generates a third voltage using a second current corresponding to a second voltage during a first period corresponding to the copied time information. The time divider generates an output according to a result of comparing a voltage generated by a first current on the basis of a voltage corresponding to a first time with a second voltage corresponding to a second time.

Claims (70)

1. A time divider comprising:

a first switch configured to perform a switching operation according to a first signal and a second switch configured to perform a switching operation according to a second signal, wherein the first signal represents a first time and the second signal represents a second time;

a first capacitor coupled to one end of the first switch and to one end of the second switch; and

a comparison part configured to generate an output based on a period for a charged voltage to reach a second voltage that corresponds to the second time, wherein the charged voltage is increased according to a first current based on a first voltage that corresponds to the first time.

2. The time divider of claim 1 , wherein the comparison part comprises:

a current source configured to supply the first current;

a third switch including one end coupled to the current source and which is turned on during a predetermined first period;

a second capacitor including one end coupled to the other end of the third switch;

a fourth switch coupled in parallel to both ends of the second capacitor and which is turned off during the first period, and

a comparator configured to compare a voltage charged in the second capacitor with the second voltage.

3. The time divider of claim 2 , wherein the comparison part further comprises:

a transistor;

a resistance coupled to one end of the transistor;

an error amplifier including an output terminal coupled to a gate of the transistor, a first input terminal to which the first voltage is input, and a second input terminal coupled to the one end of the transistor; and

a current mirror coupled to the other end of the transistor and configured to copy a current flowing in the transistor,

wherein the current source is configured to generate the first current according to a current transmitted from the current mirror.

4. The time divider of claim 1 , further comprising:

a third switch including one end coupled to one end of the first capacitor and which is turned on at a first sampling time point;

a fourth switch including one end coupled to the one end of the first capacitor and which is turned on at a second sampling time point;

a second capacitor coupled to the other end of the third switch; and

a third capacitor coupled to the other end of the fourth switch,

wherein the first voltage is a voltage sampled in the second capacitor, and the second voltage is a voltage sampled in the third capacitor.

5. The time divider of claim 4 , further comprising:

a first current source coupled to the other end of the first switch; and

a second current source coupled to the other end of the second switch.

6. The time divider of claim 4 , further comprising a current source coupled to the other end of the first switch and the other end of the second switch.

7. The time divider of claim 4 , further comprising a third switch coupled to both ends of the first capacitor,

wherein the third switch is turned on after each of the first sampling time point and the second sampling time point has ended.

8. The time divider of claim 1 , further comprising:

a second capacitor coupled to the other end of the first switch;

a third capacitor coupled to the other end of the second switch;

a third switch including one end coupled to one end of the second capacitor and which is turned on at a first sampling time point;

a fourth switch including one end coupled to one end of the third capacitor and which is turned on at the first sampling time point;

a fourth capacitor coupled to the other end of the third switch; and

a fifth capacitor coupled to the other end of the fourth switch,

wherein the first voltage is a voltage sampled in the fourth capacitor, and the second voltage is a voltage sampled in the fifth capacitor.

9. The time divider of claim 8 , further comprising a current source coupled to one end of the first capacitor.

10. The time divider of claim 9 , further comprising a fifth switch coupled to both ends of the first capacitor,

wherein the fifth switch is turned on after the first sampling time point has ended.

11. A method of operating a time divider circuit, the method comprising:

generating a first voltage on a first capacitor according to a first time period;

generating a second voltage on a second capacitor according to a second time period;

generating a first current by a current source according to the first voltage;

charging a third capacitor with the first current to generate a third voltage;

comparing the third voltage to the second voltage; and

generating an output of the time divider circuit based on a time it takes the third voltage to increase to the second voltage.

12. The method of claim 11 , wherein generating the first voltage on the first capacitor according to the first time period comprises:

charging a fourth capacitor during the first time period;

transferring to the first capacitor a first charged voltage that is charged on the fourth capacitor during the first time period.

13. The method of claim 12 , wherein generating the second voltage on the second capacitor according to the second time period comprises:

charging the fourth capacitor during the second time period;

transferring to the second capacitor a second charged voltage that is charged to the fourth capacitor during the second time period.

14. The method of claim 11 , wherein generating a first current according to the first voltage comprises:

generating a second current from the first voltage; and

mirroring the second current to the current source in order to generate the first current.

15. A time divider comprising:

a first capacitor that is configured to hold a first voltage that represents a first time period;

a second capacitor that is configured to hold a second voltage that represents a second time period; and

a comparison part that is configured to receive the first voltage and the second voltage, generate a first current by a current source according to the first voltage, charge a third capacitor with the first current, compare the second voltage to a charged voltage on the third capacitor, and generate an output based on a time it takes the charged voltage to increase to the second voltage.

16. The time divider of claim 15 , further comprising:

a first current source; and

a fourth capacitor, wherein a first charged voltage that is charged on the fourth capacitor during the first time period is transferred to the first capacitor.

17. The time divider of claim 16 , wherein a second charged voltage that is charged on the fourth capacitor during the second time period is transferred to the second capacitor.

18. The time divider of claim 16 , further comprising:

a first switch that is controlled according to the first time period to charge the fourth capacitor with current from the first current source.

19. The time divider of claim 16 , further comprising:

a second current source, wherein a second charged voltage that is charged on the fourth capacitor by the second current source during the second time period is transferred to the second capacitor.

20. The time divider of claim 19 , further comprising:

a first switch that is controlled according to the first time period to charge the fourth capacitor with current from the first current source; and

a second switch that is controlled according to the second time period to charge the fourth capacitor with current from the second current source.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0460 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064075/0001 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2017
From: KIM, TAESUNG; YANG, SEUNGUK; PARK, YOUNGBAE
To: FAIRCHILD KOREA SEMICONDUCTOR LTD.
Reel/Frame 043119/0845 →
Priority Claims (2)
KR 10-2015-0076714 · May 29, 2015 · national
KR 10-2015-0076715 · May 29, 2015 · national
Continuity (2)
Division 15166847 · May 27, 2016
Related Publication 20170324404A1 · Nov 9, 2017