IP Library Granted Patent US 10,317,762
Granted Patent B2
US 10,317,762 · App. 15/662,652 · Granted Jun 11, 2019

Active matrix circuit substrate, display device, method of driving display device, and electronic apparatus

Inventor: Katsunori Yamazaki (Matsumoto, JP)
Assignee: E Ink Corporation
G02F1/1368G02F1/1345G02F1/133528G09F9/40G09G3/344G09G2300/0809G09G2310/08
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Quick Facts
Patent No.
US 10,317,762
App. No.
15/662,652
Granted
Jun 11, 2019
Kind
B2
Abstract

An active matrix circuit substrate includes a first power supply line, a second power supply line, a third power supply line, a fourth power supply line, a first control line, and a second control line; a pixel electrode and a memory circuit; a common electrode that is electrically connected to the fourth power supply line; a capacitor that is provided between the third power supply line and the pixel electrode; a first switch circuit that is provided between the first power supply line and the pixel electrode and operates on the basis of an output of the memory circuit and a potential of the first control line; and a second switch circuit that is provided between the second power supply line and the pixel electrode and operates on the basis of the output of the memory circuit and a potential of the second control line.

Claims (42)

1. An active matrix circuit substrate comprising:

a first power supply line, a second power supply line, a third power supply line, a fourth power supply line, a first control line, and a second control line;

a pixel electrode and a memory circuit that are provided in correspondence with a pixel;

a common electrode that is electrically connected to the fourth power supply line;

a capacitor that is provided between the third power supply line and the pixel electrode;

a first switch circuit that is provided between the first power supply line and the pixel electrode and operates on the basis of an output of the memory circuit and a potential of the first control line; and

a second switch circuit that is provided between the second power supply line and the pixel electrode and operates on the basis of the output of the memory circuit and a potential of the second control line;

wherein the first switch circuit includes a first P-type transistor and a second P-type transistor that are connected in series to each other, and the second switch circuit includes a first N-type transistor and a second N-type transistor that are connected in series to each other.

2. The active matrix circuit substrate according to claim 1 , wherein the first control line and the second control line are one and the same.

3. The active matrix circuit substrate according to claim 1 , wherein at least one of the first switch circuit and the second switch circuit includes a circuit that prevents a current from flowing in reverse.

4. The active matrix circuit substrate according to claim 1 , wherein the third power supply line and the fourth power supply line are one and the same.

5. The active matrix circuit substrate according to claim 1 , further comprising:

a scan line;

a data line; and

a pixel switching element that is provided in correspondence with the pixel and is provided between the scan line, the data line, and the memory circuit.

6. A display device comprising:

the active matrix circuit substrate according to claim 1 ; and

an electro-optical material layer that is provided between the pixel electrode and the common electrode.

7. A display device comprising:

the active matrix circuit substrate according to claim 2 ; and

an electro-optical material layer that is provided between a pixel electrode and a common electrode.

8. A display device comprising:

the active matrix circuit substrate according to claim 3 ; and

an electro-optical material layer that is provided between a pixel electrode and a common electrode.

9. A display device comprising:

the active matrix circuit substrate according to claim 4 ; and

an electro-optical material layer that is provided between a pixel electrode and a common electrode.

10. A display device comprising:

the active matrix circuit substrate according to claim 5 ; and

an electro-optical material layer that is provided between a pixel electrode and a common electrode.

11. A method of driving the display device according to claim 6 , the method comprising:

causing the first switch circuit or the second switch circuit to be in a turn-off state before potentials change, when a potential of the third power supply line and a potential of the fourth power supply line change into the same phase.

12. A method of driving the display device according to claim 7 , the method comprising:

causing the first switch circuit or the second switch circuit to be in a turn-off state before potentials change when a potential of the third power supply line and a potential of the fourth power supply line change into the same phase.

13. A method of driving the display device according to claim 8 , the method comprising:

causing the first switch circuit or the second switch circuit to be in a turn-off state before potentials change, when a potential of the third power supply line and a potential of the fourth power supply line change into the same phase.

14. A method of driving the display device according to claim 9 , the method comprising:

causing the first switch circuit or the second switch circuit to be in a turn-off state before potentials change, when a potential of the third power supply line and a potential of the fourth power supply line change into the same phase.

15. A method of driving the display device according to claim 10 , the method comprising:

causing the first switch circuit or the second switch circuit to be in a turn-off state before potentials change, when a potential of the third power supply line and a potential of the fourth power supply line change into the same phase.

16. An electronic apparatus comprising: the display device according to claim 6 .

17. An electronic apparatus comprising: the display device according to claim 7 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2018
From: SEIKO EPSON CORPORATION
To: E INK CORPORATION
Reel/Frame 047072/0325 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2017
From: YAMAZAKI, KATSUNORI
To: SEIKO EPSON CORPORATION
Reel/Frame 043126/0226 →
Priority Claims (1)
JP 2016-158136 · Aug 10, 2016 · national
Continuity (1)
Related Publication 20180046006A1 · Feb 15, 2018