IP Library Granted Patent US 10,298,871
Granted Patent B2
US 10,298,871 · App. 15/670,474 · Granted May 21, 2019

Imaging systems with analog-to-digital converters

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Quick Facts
Patent No.
US 10,298,871
App. No.
15/670,474
Granted
May 21, 2019
Kind
B2
Abstract

An image sensor may contain an array of imaging pixels arranged in rows and columns. Each column of imaging pixels may be coupled to a column line which is used to read out imaging signals from the pixels. The column line may be coupled to an analog-to-digital converter for converting analog imaging signals from the pixels to digital signals. An amplifier may be included to amplify the analog imaging signals before being converted by the analog-to-digital converter. However, amplifier gain uncertainties may lead to errors in the result of the analog-to-digital conversion when the analog imaging signals are amplified by an amplifier. To mitigate these types of errors, the reference voltage for a digital-to-analog converter in the analog-to-digital converter may also be amplified by the amplifier. By multiplying the reference voltage by the same amplifier gain as the imaging signals, uncertainties in the amplifier gain will not affect the results of the analog-to-digital conversion.

Claims (42)

1. An analog-to-digital converter comprising:

a digital-to-analog converter;

an input configured to receive an output from an amplifier, wherein the analog-to-digital converter uses the output from the amplifier as a reference voltage for the digital-to-analog converter when the amplifier receives an additional reference voltage as an input to the amplifier; and

at least one switch configured to selectively couple the output from the amplifier to the digital-to-analog converter.

2. The analog-to-digital converter defined in claim 1 , wherein the analog-to-digital converter converts the output from the amplifier to a digital signal when the amplifier receives a first voltage that is different from the additional reference voltage as the input to the amplifier.

3. The analog-to-digital converter defined in claim 1 , further comprising:

a comparator; and

processing circuitry, wherein the comparator has first and second inputs, wherein the first input is configured to receive the output from the amplifier, wherein the second input is configured to receive an output voltage from the digital-to-analog converter, wherein the processing circuitry comprises successive-approximation-register logic, wherein the comparator has an output that is coupled to the successive-approximation-register logic, wherein the digital-to-analog converter receives input from the successive-approximation-register logic, and wherein the digital-to-analog converter receives the output from the amplifier at a reference voltage input.

4. The analog-to-digital converter defined in claim 3 , wherein the at least one switch is configured to selectively couple the output from the amplifier to either the first input of the comparator or the reference voltage input of the digital-to-analog converter.

5. The analog-to-digital converter defined in claim 1 , wherein the output from the amplifier is provided directly to the digital-to-analog converter when the amplifier receives the additional reference voltage as the input to the amplifier.

6. The analog-to-digital converter defined in claim 1 , wherein the analog-to-digital converter uses an analog signal from the amplifier as the reference voltage for the digital-to-analog converter when the amplifier receives the additional reference voltage as the input to the amplifier.

7. The analog-to-digital converter defined in claim 1 , further comprising:

processing circuitry, wherein the digital-to-analog converter has a first input that receives the reference voltage and a second input that receives an output from the processing circuitry.

8. The analog-to-digital converter defined in claim 7 , wherein the output from the amplifier is provided to the first input of the digital-to-analog converter when the amplifier receives the additional reference voltage as the input to the amplifier.

9. An image sensor with rows and columns of imaging pixels, the image sensor comprising:

a column line coupled to a column of imaging pixels;

an amplifier comprising an input and an output;

a reference voltage supply line;

at least a first switch that selectively couples either the column line or the reference voltage supply line to the input of the amplifier;

a comparator;

a digital-to-analog converter with a reference voltage input; and

at least a second switch that selectively couples the output from the amplifier to either the comparator or the reference voltage input of the digital-to-analog converter.

10. The image sensor defined in claim 9 , wherein the at least second switch couples the output from the amplifier to the comparator when the at least first switch couples the column line to the input of the amplifier.

11. The image sensor defined in claim 10 , wherein the at least second switch couples the output from the amplifier to the reference voltage input of the digital-to-analog converter when the at least first switch couples the reference voltage supply line to the input of the amplifier.

12. The image sensor defined in claim 9 , further comprising processing circuitry that receives an output from the comparator.

13. The image sensor defined in claim 12 , wherein the processing circuitry provides an output that is received by the digital-to-analog converter.

14. The image sensor defined in claim 9 , wherein the comparator has first and second inputs and wherein the at least second switch selectively couples the output from the amplifier to either the first input of the comparator or the reference voltage input of the digital-to-analog converter.

15. The image sensor defined in claim 14 , wherein the digital-to-analog converter has an output voltage and wherein the second input of the comparator receives the output voltage from the digital-to-analog converter.

16. An image sensor with rows and columns of imaging pixels, the image sensor comprising:

a column line coupled to a column of imaging pixels;

a first amplifier comprising an input and an output;

a reference voltage supply line;

at least a first switch that selectively couples either the column line or the reference voltage supply line to the input of the first amplifier;

a first analog-to-digital converter comprising a first comparator and a first digital-to-analog converter;

a storage capacitor;

a second analog-to-digital converter comprising a second comparator and a second digital-to-analog converter;

a second amplifier interposed between the first amplifier and the second analog-to-digital converter; and

at least a second switch that selectively couples the output from the first amplifier to either the first comparator, the first digital-to-analog converter, the storage capacitor, or an input of the second amplifier.

17. The image sensor defined in claim 16 , further comprising:

at least a third switch that selectively couples the storage capacitor to the input of the second amplifier.

18. The image sensor defined in claim 17 , further comprising:

at least a fourth switch that selectively couples an output of the second amplifier to either the second comparator or the second digital-to-analog converter, wherein the at least second switch is configured to couple the output from the first amplifier to the storage capacitor when the at least first switch is coupled to the reference voltage supply line and wherein the at least second switch is configured to couple the output from the first amplifier to the input of the second amplifier when the at least first switch is coupled to the column line.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0460 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064075/0001 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2017
From: GEURTS, TOMAS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 043219/0389 →