IP Library Granted Patent US 10,187,710
Granted Patent B2
US 10,187,710 · App. 15/670,729 · Granted Jan 22, 2019

Configurable multi-rate format for communication system for silicon photonics

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,187,710
App. No.
15/670,729
Granted
Jan 22, 2019
Kind
B2
Abstract

In an example, the present invention includes an integrated system on chip device. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. In an example, the data input/output interface is configured for number of lanes numbered from four to one hundred and fifty. In an example, the SerDes block is configured to convert a first data stream of N into a second data stream of M such that each of the first data stream having a first predefined data rate at a first clock rate and each of the second data stream having a second predefined data rate at a second clock rate.

Claims (30)

1. A device comprising:

a data input/output interface provided on a substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member coupled to the data input/output interface, the input/output block configured to convert N first data streams into M second data streams, each of the first data streams having a first predefined data rate at a first clock rate and each of the second data streams having a second predefined data rate at a second clock rate;

a signal processing block provided on the substrate member and coupled to the input/output block the signal processing block executing a wavelength divisional scheme to produce a data packet modulated with a multi-channel-multi-bitrate;

a driver module provided on the substrate member and coupled to the signal processing block using a uni-directional multi-lane bus, the driver module selected from a current driver or a voltage driver;

a receiver module provided on the substrate member and coupled to a silicon photonics device, the receiver module configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface.

2. The device of claim 1 further comprising a broad band source in optical communication with the receiver module.

3. The device of claim 1 wherein the receiver module is coupled to the silicon photonics device using a loop back signal.

4. The device of claim 3 wherein the receiver module comprises a TIA block coupled to the silicon photonics device using the loop back signal through an isolation switch.

5. The device of claim 1 wherein the driver module comprises a differential driver.

6. The device of claim 1 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

7. The device of claim 1 further comprising:

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, and the receiver module; and

a control block provided on the substrate member and coupled to the communication block.

8. A method comprising:

using a device configured for a multi-rate and selected format of data communication, comprising:

a data input/output interface provided on a substrate member and configured for a predefined data rate and protocol;

an input/output block provided on the substrate member and coupled to the data input/output interface, the input/output block configured to convert N first data streams into M second data streams, each of the first data streams having a first predefined data rate at a first clock rate and each of the second data streams having a second predefined data rate at a second clock rate;

a signal processing block provided on the substrate member and coupled to the input/output block the signal processing block executing a wavelength divisional scheme to produce a data packet modulated with a multi-channel-multi-bit rate;

a driver module provided on the substrate member and coupled to the signal processing block using a uni-directional multi-lane bus, the driver module selected from a current driver or a voltage driver;

a receiver module provided on the substrate member and coupled to a silicon photonics device, the receiver module configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;

a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, and the receiver module;

a control block provided on the substrate member and coupled to the communication block;

initiating a signal from the control block to initiate a laser bias or a modulator bias; and tuning, using the control block, the silicon photonics device.

9. The method of claim 8 wherein the driver module is a differential driver.

10. The method of claim 8 wherein:

the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

11. The method claim 8 further comprising a broad band source in optical communication with the receiver module.

12. The method claim 8 wherein the receiver module is coupled to the silicon photonics device using a loop back signal.

13. The method claim 12 wherein the loop back signal is from an optical tap coupler.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2017
From: NAGARAJAN, RADHAKRISHNAN L.
To: INPHI CORPORATION
Reel/Frame 043484/0765 →