IP Library Granted Patent US 10,634,109
Granted Patent B2
US 10,634,109 · App. 15/674,017 · Granted Apr 28, 2020

Multiple pulse ignition system control

Inventor: Qingquan Tang (Breinigsville, PA)
Assignee: Fairchild Semiconductor Corporation
F02P3/055F02P3/045F02P3/0407F02P3/053H01F38/12F02P5/1502
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Quick Facts
Patent No.
US 10,634,109
App. No.
15/674,017
Granted
Apr 28, 2020
Kind
B2
Abstract

In a general aspect, an ignition circuit can include a control circuit that is coupled with an engine control unit (ECU) to receive a command signal from the ECU. The control circuit can include a multi-pulse generator configured to, in response to the command signal, generate a multi-pulse drive signal. The multi-pulse drive signal can include a first pulse cycle having a first duty cycle, a second pulse cycle having a second duty cycle, and a dwell period during which the multi-pulse drive signal continuously remains at a logic high value. The control circuit can be configured to provide the multi-pulse drive signal to an ignition switch coupled with the control circuit to receive the multi-pulse drive signal.

Claims (42)

1. A method comprising:

receiving, at a control circuit from an engine control unit, a command signal;

in response to the command signal, generating a multi-pulse drive signal, the multi-pulse drive signal including, in sequence:

a first pulse cycle having a first duty cycle;

a second pulse cycle having a second duty cycle; and

a dwell period during which the multi-pulse drive signal continuously remains at a logic high value;

providing the multi-pulse drive signal to a control terminal of an ignition switch; and

in response to the multi-pulse drive signal:

storing energy in an ignition coil using current conducted through the ignition coil by the ignition switch; and

initiating, with the energy stored in the ignition coil, a spark in a spark plug coupled with the ignition coil.

2. The method of claim 1 , wherein the first duty cycle is less than the second duty cycle.

3. The method of claim 1 , wherein a cycle time of the first pulse cycle is substantially equal to a cycle time of the second pulse cycle.

4. The method of claim 1 , wherein the multi-pulse drive signal further includes:

a third pulse cycle in sequence after the second pulse cycle and before the dwell period, the third pulse cycle having a third duty cycle that is greater than the second duty cycle.

5. The method of claim 4 , wherein the multi-pulse drive signal further includes:

a fourth pulse cycle in sequence after the third pulse cycle and before the dwell period, the fourth pulse cycle having a fourth duty cycle that is greater than the third duty cycle.

6. The method of claim 5 , wherein a cycle time of the first pulse cycle, a cycle time of the second pulse cycle, a cycle time of the third pulse cycle and a cycle time of the fourth pulse cycle are substantially equal.

7. The method of claim 5 , wherein the dwell period includes a delay corresponding with a period of time of time used to provide the first pulse cycle, the second pulse cycle, the third pulse cycle and the fourth pulse cycle, the delay occurring after the command signal changes from a logic high value to a logic low value.

8. The method of claim 1 , wherein the dwell period includes a delay corresponding with a period of time of time used to provide the first pulse cycle and the second pulse cycle, the delay occurring after the command signal changes from a logic high value to a logic low value.

9. The method of claim 1 , wherein the first pulse cycle includes a pulse that has a width that is less than a width of a pulse of the second pulse cycle.

10. An ignition circuit comprising:

a control circuit that is coupled with an engine control unit (ECU) to receive a command signal from the ECU, the control circuit including a multi-pulse generator configured to, in response to the command signal, generate a multi-pulse drive signal including:

a first pulse cycle having a first duty cycle;

a second pulse cycle having a second duty cycle; and

a dwell period during which the multi-pulse drive signal continuously remains at a logic high value,

the control circuit being configured to provide the multi-pulse drive signal to an ignition switch coupled with the control circuit to receive the multi-pulse drive signal.

11. The ignition circuit of claim 10 , wherein the ignition switch is configured, in response to the multi-pulse drive signal, to:

store energy in an ignition coil coupled with the ignition switch using current conducted through the ignition coil by the ignition switch; and

initiate, with the energy stored in the ignition coil, a spark in a spark plug coupled with the ignition coil.

12. The ignition circuit of claim 10 , wherein the ignition switch includes an ignition insulated-gate bipolar transistor (IGBT).

13. The ignition circuit of claim 12 , wherein the ignition IGBT includes:

an IGBT; and

a resistor-diode network defining a voltage clamp of the ignition circuit.

14. The ignition circuit of claim 10 , wherein the first duty cycle is less than the second duty cycle.

15. The ignition circuit of claim 10 , wherein a cycle time of the first pulse cycle is substantially equal to a cycle time of the second pulse cycle.

16. The ignition circuit of claim 10 , wherein the multi-pulse drive signal further includes:

a third pulse cycle in sequence after the second pulse cycle and before the dwell period, the third pulse cycle having a third duty cycle that is greater than the second duty cycle.

17. The ignition circuit of claim 16 , wherein the multi-pulse drive signal further includes:

a fourth pulse cycle in sequence after the third pulse cycle and before the dwell period, the fourth pulse cycle having a fourth duty cycle that is greater than the third duty cycle.

18. The ignition circuit of claim 17 , wherein a cycle time of the first pulse cycle, a cycle time of the second pulse cycle, a cycle time of the third pulse cycle and a cycle time of the fourth pulse cycle are substantially equal.

19. The ignition circuit of claim 10 , wherein the dwell period includes a delay corresponding with a period of time used to provide the first pulse cycle and the second pulse cycle, the delay occurring after the command signal changes from a logic high value to a logic low value.

20. The ignition circuit of claim 10 , wherein the first pulse cycle includes a pulse that has a width that is less than a width of a pulse of the second pulse cycle.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 046530, FRAME 0460 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064075/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Jul 11, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046530/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2017
From: TANG, QINGQUAN
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 043298/0082 →
Continuity (2)
Provisional Application 62380152 · Aug 26, 2016
Related Publication 20180058414A1 · Mar 1, 2018