Semiconductor wafer and method of manufacturing semiconductor element
A semiconductor wafer is provided with a thick region extending along its outer circumferential surface and being greater in thickness than its central region. A main surface of the wafer includes a slope surface located between the central region and the thick region. The slope surface has an inner circumferential edge and an outer circumferential edge, and slopes such that the thickness of the wafer increases from the inner circumferential edges to the outer circumferential edge. The slope surface includes an inner circumferential portion including the inner circumferential edge, an outer circumferential portion including the outer circumferential edge and an intermediate portion located between the inner and the outer circumferential portions. At least one of slope angles of the inner and the outer circumferential portions is smaller than a slope angle of the intermediate portion.
1. A semiconductor wafer comprising:
a central region in a planer view; and
a thick region extending along an outer circumferential surface of the semiconductor wafer in the planer view, the thick region being greater in thickness than the central region,
wherein one of main surfaces of the semiconductor wafer comprises a slope surface located between the central region and the thick region,
the slope surface comprises: an inner circumferential edge located on a side of the central region; and an outer circumferential edge located on a side of the thick region, the slope surface sloping such that the thickness of the semiconductor wafer increases from the inner circumferential edge to the outer circumferential edge,
the slope surface comprises: an inner circumferential portion including the inner circumferential edge; an outer circumferential portion including the outer circumferential edge; and an intermediate portion located between the inner circumferential portion and the outer circumferential portion, and
at least one of a slope angle of the inner circumferential portion and a slope angle of the outer circumferential portion is smaller than a slope angle of the intermediate portion.
2. The semiconductor wafer according to claim 1 , wherein the slope angle of the outer circumferential portion is smaller than the slope angle of the intermediate portion.
3. The semiconductor wafer according to claim 2 , wherein the slope angle of the inner circumferential portion is equal to the slope angle of the intermediate portion.
4. The semiconductor wafer according to claim 1 , wherein the slope angle of the inner circumferential portion is smaller than the slope angle of the intermediate portion.
5. The semiconductor wafer according to claim 4 , wherein the slope angle of the outer circumferential portion is equal to the slope angle of the intermediate portion.
6. The semiconductor wafer according to claim 1 , wherein both the slope angle of the inner circumferential portion and the slope angle of the outer circumferential portion are smaller than the slope angle of the intermediate portion.
7. A method for manufacturing a semiconductor element, comprising:
forming a partial structure of the semiconductor element within a central portion of a semiconductor wafer in a planer view;
forming a thick region that extends along an outer circumferential surface of the semiconductor wafer in the planer view by grinding the central portion from one of main surfaces of the semiconductor wafer, the thick region being greater in thickness than the central region; and
forming another partial structure of the semiconductor element within the central portion of the semiconductor wafer from the one of the main surfaces of the semiconductor wafer,
wherein the forming the thick region further forms a slope surface located between the central region and the thick region on the one of the main surfaces of the semiconductor wafer,
the slope surface comprises: an inner circumferential edge located on a side of the central region; and an outer circumferential edge located on a side of the thick region, the slope surface sloping such that the thickness of the semiconductor wafer increases from the inner circumferential edge to the outer circumferential edge,
the slope surface comprises: an inner circumferential portion including the inner circumferential edge; an outer circumferential portion including the outer circumferential edge; and an intermediate portion located between the inner circumferential portion and the outer circumferential portion, and
at least one of a slope angle of the inner circumferential portion and a slope angle of the outer circumferential portion is smaller than a slope angle of the intermediate portion.