Multi-channel digital step attenuator architecture
A multi-channel digital step attenuator (DSA) architecture. One embodiment includes an array comprising N channels of B selectable attenuator cells series-connected. The overall impedance of a multi-channel DSA is a function of the parallel impedances of the N channels, and transition levels are reduced by 1/N since the transient effect of switching any one attenuator cell in or out of circuit in one channel is mitigated by all other in-circuit attenuator cells in the parallel channels. The multi-channel DSA architecture enables a great design flexibility, and allows a designer to vary one or more of at least the following design parameters: the number of attenuator cells B per channel; the number N of channels per DSA; the bit weighting of each attenuator cell per channel; the maximum attenuation per channel; and the characteristic impedance Zo n of each channel.
1. A multi-channel digital step attenuator comprising a two-dimensional array of N channels of B selectable attenuator cells series-connected between an input port and an output port, where N is an integer greater than one and n is a channel number within the N channels, and B is an integer greater than one and b is a bit position within the B selectable attenuator cells, wherein more than one channel of B selectable attenuator cells can be active at one time.
2. The invention of claim 1 , wherein each attenuator cell has at least two selectable states, the selectable states comprising at least one attenuation state providing a corresponding specified level of attenuation of a signal applied at the input port, and a bypass state providing essentially no significant attenuation of the applied signal.
3. The invention of claim 2 , wherein the applied signal is a radio frequency signal.
4. The invention of claim 1 , wherein at least one selectable attenuator cell is one of a Bridged-Tee, Pi, Tee, or L-pad type selectable attenuator cell.
5. The invention of claim 1 , wherein at least one selectable attenuator cell is a multi-state attenuator cell.
6. The invention of claim 1 , wherein at least one channel within the N channels includes at least one branch of selectable attenuator cells.
7. The invention of claim 1 , further including at least one interconnection between at least two channels within the N channels.
8. The invention of claim 7 , wherein at least one interconnection is between adjacent attenuator cells within the at least two channels.
9. The invention of claim 7 , wherein at least one interconnection is between offset attenuator cells within the at least two channels.
10. The invention of claim 1 , wherein the selectable attenuator cells within at least a first channel include one or more L-pad type selectable attenuator cells of a first orientation, and the selectable attenuator cells within at least a second channel include one or more L-pad type selectable attenuator cells of a second orientation.
11. The invention of claim 10 , wherein an additional amount of skew impedance is added to one or more of the L-pad type selectable attenuator cells having the first or the second orientation to achieve approximately matching channel impedances.
12. The invention of claim 1 , further including one or more cross-channel resistors selectively actuatable so as to form a matrix of cross-connected selectable attenuator cells between at least one selected pair of channels.
13. The invention of claim 1 , wherein each channel of selectable attenuator cells has a selected bit weighting.
14. The invention of claim 13 , wherein at least one channel has a selected bit weighting of a first type, and at least one other channel has a selected bit weighting of a second type.
15. The invention of claim 1 , wherein the number of selectable attenuator cells in at least one channel differs from the number of selectable attenuator cells in at least one other channel.
16. The invention of claim 1 , wherein each channel of selectable attenuator cells has a corresponding maximum attenuation, and the corresponding maximum attenuation of at least one channel differs from the corresponding maximum attenuation of at least one other channel.
17. The invention of claim 1 , wherein each channel of selectable attenuator cells has a corresponding characteristic impedance, and the corresponding characteristic impedance of at least one channel differs from the corresponding characteristic impedance of at least one other channel.
18. The invention of claim 1 , wherein at least one channel includes a coplanar waveguide.
19. A method for implementing a multi-channel digital step attenuator including providing a two-dimensional array of N channels of B selectable attenuator cells series-connected between an input port and an output port, where N is an integer greater than one and n is a channel number within the N channels, and B is an integer greater than one and b is a bit position within the B selectable attenuator cells, wherein more than one channel of B selectable attenuator cells can be active at one time.
20. The method of claim 19 , wherein each attenuator cell has at least two selectable states, the selectable states comprising at least one attenuation state providing a corresponding specified level of attenuation of a signal applied at the input port, and a bypass state providing essentially no significant attenuation of the applied signal.
21. The method of claim 20 , wherein the applied signal is a radio frequency signal.
22. The method of claim 19 , wherein at least one selectable attenuator cell is one of a Bridged-Tee, Pi, Tee, or L-pad type selectable attenuator cell.
23. The method of claim 19 , wherein at least one selectable attenuator cell is a multi-state attenuator cell.
24. The method of claim 19 , wherein at least one channel within the N channels includes at least one branch of selectable attenuator cells.
25. The method of claim 19 , further including forming at least one interconnection between at least two channels within the N channels.
26. The method of claim 25 , wherein at least one interconnection is between adjacent attenuator cells within the at least two channels.
27. The method of claim 25 , wherein at least one interconnection is between offset attenuator cells within the at least two channels.
28. The method of claim 19 , wherein the selectable attenuator cells within at least a first channel include one or more L-pad type selectable attenuator cells of a first orientation, and the selectable attenuator cells within at least a second channel include one or more L-pad type selectable attenuator cells of a second orientation.
29. The method of claim 28 , further including adding an amount of skew impedance to one or more of the L-pad type selectable attenuator cells having the first or the second orientation to achieve approximately matching channel impedances.
30. The method of claim 19 , further including forming and connecting one or more selectively actuatable cross-channel resistors in a matrix of cross-connected selectable attenuator cells between at least one selected pair of channels.
31. The method of claim 19 , wherein each channel of selectable attenuator cells has a selected bit weighting.
32. The method of claim 31 , wherein at least one channel has a selected bit weighting of a first type, and at least one other channel has a selected bit weighting of a second type.
33. The method of claim 19 , wherein the number of selectable attenuator cells in at least one channel differs from the number of selectable attenuator cells in at least one other channel.
34. The method of claim 19 , wherein each channel of selectable attenuator cells has a corresponding maximum attenuation, and the corresponding maximum attenuation of at least one channel differs from the corresponding maximum attenuation of at least one other channel.
35. The method of claim 19 , wherein each channel of selectable attenuator cells has a corresponding characteristic impedance, and the corresponding characteristic impedance of at least one channel differs from the corresponding characteristic impedance of at least one other channel.
36. The method of claim 19 , wherein at least one channel includes a coplanar waveguide.
37. The invention of any one of claims 1 through 36 :
(a) wherein each attenuator cell has at least two selectable states, the selectable states comprising at least one attenuation state providing a corresponding specified level of attenuation of a signal applied at the input port, and a bypass state providing essentially no significant attenuation of the applied signal;
(b) wherein the applied signal is a radio frequency signal;
(c) wherein at least one selectable attenuator cell is one of a Bridged-Tee, Pi, Tee, or L-pad type selectable attenuator cell;
(d) wherein at least one selectable attenuator cell is a multi-state attenuator cell;
(e) wherein at least one channel within the N channels includes at least one branch of selectable attenuator cells;
(f) further including at least one interconnection between at least two channels within the N channels;
(g) wherein at least one interconnection is between adjacent attenuator cells within the at least two channels;
(h) wherein at least one interconnection is between offset attenuator cells within the at least two channels;
(i) wherein the selectable attenuator cells within at least a first channel include one or more L-pad type selectable attenuator cells of a first orientation, and the selectable attenuator cells within at least a second channel include one or more L-pad type selectable attenuator cells of a second orientation;
(j) wherein an additional amount of skew impedance is added to one or more of the L-pad type selectable attenuator cells having the first or the second orientation to achieve approximately matching channel impedances;
(k) further including one or more cross-channel resistors selectively actuatable so as to form a matrix of cross-connected selectable attenuator cells between at least one selected pair of channels;
(l) wherein each channel of selectable attenuator cells has a selected bit weighting;
(m) wherein at least one channel has a selected bit weighting of a first type, and at least one other channel has a selected bit weighting of a second type;
(n) wherein the number of selectable attenuator cells in at least one channel differs from the number of selectable attenuator cells in at least one other channel;
(o) wherein each channel of selectable attenuator cells has a corresponding maximum attenuation, and the corresponding maximum attenuation of at least one channel differs from the corresponding maximum attenuation of at least one other channel;
(p) wherein each channel of selectable attenuator cells has a corresponding characteristic impedance, and the corresponding characteristic impedance of at least one channel differs from the corresponding characteristic impedance of at least one other channel;
(q) further including forming at least one interconnection between at least two channels within the N channels;
(r) further including adding an amount of skew impedance to one or more of the L-pad type selectable attenuator cells having the first or the second orientation to achieve approximately matching channel impedances;
(s) further including forming and connecting one or more selectively actuatable cross-channel resistors in a matrix of cross-connected selectable attenuator cells between at least one selected pair of channels; and/or
(t) wherein at least one channel includes a coplanar waveguide.