IP Library Granted Patent US 10,439,732
Granted Patent B2
US 10,439,732 · App. 15/685,205 · Granted Oct 8, 2019

Receiving device and phase-error compensation method

Inventors: Tomofumi Oyama (Kawasaki, JP); Takeshi Hoshida (Kawasaki, JP); Hisao Nakashima (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H04B10/6165H04B10/0779H04B10/63H04B2210/074
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Quick Facts
Patent No.
US 10,439,732
App. No.
15/685,205
Granted
Oct 8, 2019
Kind
B2
Abstract

A receiving device receives a received signal in which a data signal, modulated by using a phase modulation method, and a pilot signal are time-multiplexed. The receiving device includes a synchronizing circuit that synchronizes the phase of the received signal. The synchronizing circuit extracts a pilot signal from the received signal. The synchronizing circuit estimates a phase error by comparing the extracted pilot signal and a predetermined pattern. The synchronizing circuit conducts phase rotation on constellation points of the received signal in accordance with the reference phase, obtained from the phase error, and the phase in the modulation method related to the received signal. The synchronizing circuit estimates a phase estimate value of the received signal in accordance with the constellation points, on which phase rotation has been conducted. The synchronizing circuit compensates for a phase error of the received signal in accordance with the phase estimate value.

Claims (22)

1. A receiving device that receives a received signal in which a data signal, modulated by using a phase modulation method or a phase-amplitude modulation method, and a pilot signal are time-multiplexed, the receiving device comprising:

a synchronizing circuit that synchronizes a phase of the received signal, wherein

the synchronizing circuit is configured to:

extract the pilot signal from the received signal;

estimate a phase error by comparing the extracted pilot signal and a predetermined pattern of the extracted pilot signal;

raise the received signal to a power of less than a multi-valued number in the modulation method related to the received signal to consolidate constellation points, corresponding to the multi-valued number, into constellation points of less than the multi-valued number;

conduct phase rotation on the consolidated constellation points of the received signal in accordance with a reference phase obtained from the estimated phase error, and a phase in the modulation method related to the received signal, so as to remove modulated components in the constellation points of the received signal;

estimate a phase estimate value of the received signal in accordance with the constellation points, on which the phase rotation has been conducted so as to remove the modulated components; and

compensate for a phase error of the received signal in accordance with the estimated phase estimate value.

2. The receiving device according to claim 1 , wherein

the synchronizing circuit is configured to raise the received signal to a power of the multi-valued number/2 in the modulation method related to the received signal to consolidate constellation points, corresponding to the multi-valued number, into constellation points at two areas.

3. The receiving device according to claim 1 , wherein

the synchronizing circuit is configured to conduct phase rotation such that each constellation point, included in the consolidated constellation points, is consolidated into a neighborhood of a constellation point in a vicinity of the reference phase.

4. The receiving device according to claim 1 , wherein in a case of the received signal in the phase modulation method, the synchronizing circuit is configured to consolidate constellation points, corresponding to the multi-valued number, into constellation points of less than the multi-valued number.

5. The receiving device according to claim 1 , wherein in a case of the received signal in the phase-amplitude modulation method, the synchronizing circuit is configured to consolidate constellation points, corresponding to the multi-valued number, into constellation points that are included in the constellation points that correspond to the multi-valued number and that have a relation of an integral multiple of 90 degrees.

6. A phase-error compensation method that is implemented by a synchronizing circuit that synchronizes a phase of a received signal in a receiving device that receives the received signal in which a data signal, modulated by using a phase modulation method or a phase-amplitude modulation method, and a pilot signal are time-multiplexed, the phase-error compensation method comprising:

extracting, by the synchronizing circuit, the pilot signal from the received signal;

estimating, by the synchronizing circuit, a phase error by comparing the extracted pilot signal and a predetermined pattern of the extracted pilot signal;

raising, by the synchronizing circuit, the received signal to a power of less than a multi-valued number in the modulation method related to the received signal to consolidate constellation points, corresponding to the multi-valued number, into constellation points of less than the multi-valued number;

conducting, by the synchronizing circuit, phase rotation on the consolidated constellation points of the received signal in accordance with a reference phase, obtained from the estimated phase error, and a phase in the modulation method related to the received signal, so as to remove modulated components in the constellation points of the received signal;

estimating, by the synchronizing circuit, a phase estimate value of the received signal in accordance with the constellation points, on which the phase rotation has been conducted so as to remove the modulated components; and

compensating for a phase error of the received signal in accordance with the estimated phase estimate value, by the synchronizing circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2026
From: FUJITSU LIMITED
To: 1FINITY INC.
Reel/Frame 074197/0244 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2017
From: OYAMA, TOMOFUMI; HOSHIDA, TAKESHI; NAKASHIMA, HISAO
To: FUJITSU LIMITED
Reel/Frame 043405/0258 →
Priority Claims (1)
JP 2016-177088 · Sep 9, 2016 · national
Continuity (1)
Related Publication 20180076903A1 · Mar 15, 2018