IP Library Granted Patent US 10,110,213
Granted Patent B2
US 10,110,213 · App. 15/685,508 · Granted Oct 23, 2018

Semiconductor device

Inventors: Tomoki Hikichi (Chiba, JP); Minoru Ariyama (Chiba, JP); Kozo Iijima (Chiba, JP); Masashi Shiga (Chiba, JP)
Assignee: ABLIC INC.
H03K5/24G01R19/0092G01R19/16566
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Quick Facts
Patent No.
US 10,110,213
App. No.
15/685,508
Granted
Oct 23, 2018
Kind
B2
Abstract

Provided is a semiconductor device which is testable even with an inspection apparatus having low current drivability, and includes an output terminal which is also used as a test terminal and an output driver having high current drivability. The semiconductor device includes a plurality of voltage determination circuits connected to the output terminal of the semiconductor device, and have threshold values that are different from each other, an encoding circuit connected to the plurality of voltage determination circuits, and configured to output an encoded signal, and a mode switching circuit configured to output a mode signal to an internal circuit depending on the encoded signal and a signal from the internal circuit.

Claims (32)

1. A semiconductor device, comprising:

an output driver configured to output a signal input from an internal circuit to an output terminal;

a first voltage determination circuit connected to the output terminal, and having a first threshold value;

a second voltage determination circuit connected to the output terminal, and having a second threshold value higher than the first threshold value;

a third voltage determination circuit connected to the output terminal, and having a third threshold value higher than the second threshold value;

an encoding circuit connected to the first voltage determination circuit, the second voltage determination circuit, and the third voltage determination circuit, and configured to output a binary encoded signal depending on output signals from the first voltage determination circuit, the second voltage determination circuit, and the third voltage determination circuit; and

a mode switching circuit connected to the encoding circuit, and configured to output a mode signal to the internal circuit depending on the binary encoded signal and the signal from the internal circuit which are input to the mode switching circuit.

2. A semiconductor device according to claim 1 , wherein the encoding circuit is configured to:

output a first logic signal when a potential of the output terminal is lower than the first threshold value;

output a second logic signal when the potential of the output terminal is the first threshold value or more, and is lower than the second threshold value;

output the first logic signal when the potential of the output terminal is the second threshold value or more, and is lower than the third threshold value; and

output the second logic signal when the potential of the output terminal is the third threshold value or more.

3. A semiconductor device according to claim 1 , further comprising a low-pass filter provided between the output terminal and the first voltage determination circuit, the second voltage determination circuit, and the third voltage determination circuit.

4. A semiconductor device according to claim 2 , further comprising a low-pass filter provided between the output terminal and the first voltage determination circuit, the second voltage determination circuit, and the third voltage determination circuit.

5. A semiconductor device, comprising:

an output driver configured to output a signal input from an internal circuit to an output terminal;

a first voltage determination circuit connected to the output terminal, and having a first threshold value;

a second voltage determination circuit connected to the output terminal, and having a second threshold value higher than the first threshold value;

a third voltage determination circuit connected to the output terminal of the semiconductor device, and having a third threshold value higher than the second threshold value;

a fourth voltage determination circuit connected to the output terminal of the semiconductor device, and having a fourth threshold value higher than the third threshold value;

a fifth voltage determination circuit connected to the output terminal of the semiconductor device, and having a fifth threshold value higher than the fourth threshold value;

an encoding circuit connected to the first voltage determination circuit, the second voltage determination circuit, the third voltage determination circuit, the fourth voltage determination circuit, and the fifth voltage determination circuit, and configured to output a binary encoded signal depending on output signals from the first voltage determination circuit, the second voltage determination circuit, the third voltage determination circuit, the fourth voltage determination circuit, and the fifth voltage determination circuit; and

a mode switching circuit connected to the encoding circuit, and configured to output a mode signal to the internal circuit depending on the binary encoded signal and the signal from the internal circuit which are input to the mode switching circuit.

6. A semiconductor device according to claim 5 , wherein the encoding circuit is configured to:

output a first logic signal when a potential of the output terminal is lower than the first threshold value;

output a second logic signal when the potential of the output terminal is the first threshold value or more, and is lower than the second threshold value;

output the first logic signal when the potential of the output terminal is the second threshold value or more, and is lower than the third threshold value;

output the second logic signal when the potential of the output terminal is the third threshold value or more, and is lower than the fourth threshold value;

output the first logic signal when the potential of the output terminal is the fourth threshold value or more, and is lower than the fifth threshold value; and

output the second logic signal when the potential of the output terminal is the fifth threshold value or more.

7. A semiconductor device according to claim 5 , further comprising a low-pass filter provided between the output terminal and the first voltage determination circuit, the second voltage determination circuit, the third voltage determination circuit, the fourth voltage determination circuit, and the fifth voltage determination circuit.

8. A semiconductor device according to claim 6 , further comprising a low-pass filter provided between the output terminal and the first voltage determination circuit, the second voltage determination circuit, the third voltage determination circuit, the fourth voltage determination circuit, and the fifth voltage determination circuit.

Assignments (2)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2017
From: HIKICHI, TOMOKI; ARIYAMA, MINORU; IIJIMA, KOZO; SHIGA, MASASHI
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 043408/0459 →
Priority Claims (2)
JP 2016-165828 · Aug 26, 2016 · national
JP 2017-136328 · Jul 12, 2017 · national
Continuity (1)
Related Publication 20180062631A1 · Mar 1, 2018