Smooth waveguide structures and manufacturing methods
In integrated optical structures (e.g., silicon-to-silicon-nitride mode converters) implemented in semiconductor-on-insulator substrates, wire waveguides whose sidewalls substantially consist of portions coinciding with crystallographic planes and do not extend laterally beyond the top surface of the wire waveguide may provide benefits in performance and/or manufacturing needs. Such wire waveguides may be manufactured, e.g., using a dry-etch of the semiconductor device layer down to the insulator layer to form a wire waveguide with exposed sidewalls, followed by a smoothing crystallographic wet etch.
1. An integrated optical structure comprising:
a semiconductor-on-insulator substrate comprising a semiconductor device layer;
a wire waveguide formed in the semiconductor device layer, the wire waveguide having a top surface and sidewalls and comprising a tapered region decreasing in width towards a narrow end; and
a second waveguide disposed above or below the tapered region of the wire waveguide at the narrow end, the second waveguide made from a different material than the wire waveguide, and the second waveguide and wire waveguide together forming an optical mode converter,
wherein the sidewalls, along a length of the wire waveguide in the tapered region, do not extend laterally beyond the top surface of the wire waveguide and substantially consist of sidewall portions coinciding with crystallographic planes of the wire waveguide, and
wherein, along a portion of the tapered region of the wire waveguide that has a width of less than 0.5 μm, a return loss is less than −40 dB/mm across an operating wavelength range.
2. The integrated optical structure of claim 1 , wherein the sidewall portions comprise, along the length of the wire waveguide in the tapered region, one or more substantially planar upper portions extending from a top edge of the wire waveguide at an acute angle with respect to the top surface of the wire waveguide and one or more substantially planar lower portions extending from a bottom edge of the wire waveguide at an acute angle with respect to a bottom surface of the wire waveguide, the upper and lower portions meeting at a medial horizontal plane of the wire waveguide.
3. The integrated optical structure of claim 1 , wherein the sidewalls have sub-nanometer surface roughness along the length in the tapered region.
4. The integrated optical structure of claim 1 , wherein the substrate is a silicon-on-insulator substrate.
5. The integrated optical structure of claim 1 , further comprising a rib waveguide formed in the semiconductor device layer on top of and parallel to the wire waveguide, the rib waveguide being tapered in at least one of width and height in a same direction along a length of the rib waveguide as the wire waveguide.
6. The integrated optical structure of claim 1 , wherein a refractive index of a material of the wire waveguide is greater than a refractive index of the material of the second waveguide.
7. The integrated optical structure of claim 6 , wherein the wire waveguide is made of silicon and the second waveguide is made of silicon nitride.
8. The integrated optical structure of claim 1 , wherein the sidewall portions are atomically smooth.
9. A photonic integrated circuit (PIC) comprising:
an optical mode converter comprising a first waveguide made of a first material and tapered towards one end, and disposed above or below the first waveguide at the tapered end, a second waveguide made of a second material, a refractive index of the first material being greater than a refractive index of the second material,
wherein the first waveguide is a wire waveguide having a top surface and sidewalls, and wherein the sidewalls, along at least a portion of a length of the wire waveguide at the tapered end, do not extend laterally beyond the top surface and substantially consist of sidewall portions coinciding with crystallographic planes of the wire waveguide.
10. The PIC of claim 9 , wherein the wire waveguide is formed in a silicon device layer of a silicon-on-insulator substrate and the second waveguide is formed in a silicon-nitride layer disposed above the silicon device layer, the PIC further comprising a silicon-nitride grating coupler coupled to the second waveguide and one or more silicon devices coupled to the wire waveguide.
11. The PIC of claim 10 , further comprising a rib waveguide formed in the silicon device layer on top of and parallel to the wire waveguide, the rib waveguide being tapered in at least one of width and height in a same direction along a length of the rib waveguide as the wire waveguide.
12. The PIC of claim 9 , wherein the sidewall portions comprise, along at least the portion of the length of the wire waveguide, one or more substantially planar upper portions extending from a top edge of the wire waveguide at an acute angle with respect to the top surface of the wire waveguide and one or more substantially planar lower portions extending from a bottom edge of the wire waveguide at an acute angle with respect to a bottom surface of the wire waveguide, the upper and lower portions meeting at a medial horizontal plane of the wire waveguide.
13. The PIC of claim 9 , wherein the sidewalls have sub-nanometer surface roughness along at least the portion of the length of the wire waveguide.