ESD protection SCR device
An ESD protection SCR device includes a semiconductor substrate, an epitaxial layer, device isolation layers, an n-type well formed in an anode region, a first high concentration p-type impurity region formed on a surface portion of the n-type well, a first high concentration n-type impurity region formed on the surface portion of the n-type well, a p-type well formed in an cathode region, a second high concentration n-type impurity region formed on a surface portion of the p-type well, a second high concentration p-type impurity region formed on a surface portion of the p-type well so as to be spaced apart from the second high concentration n-type impurity region, and a third high-concentration p-type impurity region formed on the surface portion of the p-type well so as to surround a side portion of the second high-concentration n-type impurity region, adjacent to the anode region.
1. An ESD protection SCR device comprising:
a semiconductor substrate of p-type conductivity;
an epitaxial layer of p-type conductivity arranged on the semiconductor substrate and defining an upper surface;
a plurality of device isolation layers arranged on the upper surface to divide the epitaxial layer into an anode region and a cathode region;
an n-type well arranged in the anode region of the epitaxial layer;
a first high concentration p-type impurity region arranged on a surface portion of the n-type well and connected to an anode terminal;
a first high concentration n-type impurity region arranged on the surface portion of the n-type well so as to at least partially surround the first high concentration p-type impurity region;
a p-type well arranged in the cathode region of the epitaxial layer;
a second high concentration n-type impurity region arranged on a surface portion of the p-type well and connected to a cathode terminal;
a second high concentration p-type impurity region arranged on a surface portion of the p-type well so as to be spaced apart from the second high concentration n-type impurity region and connected to the cathode; and
a third high-concentration p-type impurity region arranged on the surface portion of the p-type well so as to at least partially surround a side portion of the second high-concentration n-type impurity region, adjacent to the anode region.
2. The ESD protection SCR device of claim 1 , wherein the n-type well has a ring structure to surround the p-type well.
3. The ESD protection SCR device of claim 1 , wherein a first portion of the first high concentration n-type impurity region is arranged distant from the cathode region and has a width larger than a second portion of the first high concentration n-type impurity region arranged adjacent to the cathode region.
4. The ESD protection SCR device of claim 1 , wherein the epitaxial layer further includes a P-body region arranged along the surface portion of the first p-type well and under the third high p-type impurity region.
5. The ESD protection SCR device of claim 1 , further comprising n-type drift ion regions arranged at side portions of the first n-type well.
6. The ESD protection SCR device of claim 5 , wherein the epitaxial layer further includes an n-type deep well arranged under the first n-type well.
7. The ESD protection SCR device of claim 6 , further comprising an n-type buried layer arranged under the n-type deep well and along an interface between the epitaxial layer and the semiconductor substrate.
8. The ESD protection SCR device of claim 5 , wherein the epitaxial layer further includes an n-type deep well formed under both the first n-type well and the first p-type well.
9. The ESD protection SCR device of claim 1 , further comprising:
n-type drift ion regions arranged at side portions of the first n-type well; and
a gate arranged between one of the n-type drift ion regions and the third high concentration p-type impurity region and on both the first p-type well and one of the device isolation layers.
10. The ESD protection SCR device of claim 1 , wherein the epitaxial layer further includes a P-Body region arranged under both the gate and the third high p-type impurity region.
11. The ESD protection SCR device of claim 1 , wherein the device isolation layers divide the epitaxial layer into a P-Sub region additionally, further comprising:
a second p-type well arranged in the P-Sub region of the epitaxial layer; and
a fourth high concentration p-type impurity region arranged on a surface portion of the second p-type well and connected to a P-Sub terminal.
12. The ESD protection SCR device of claim 11 , wherein the second p-type well has a ring structure to surround the first n-type well and the first p-type well.