IP Library Granted Patent US 10,541,647
Granted Patent B2
US 10,541,647 · App. 15/702,144 · Granted Jan 21, 2020

Transconductance (g

Inventors: Howard Chi (Palo Alto, CA); Seema B. Anand (Irvine, CA)
Assignee: Avago Technologies International Sales Pte. Limited
H03B5/1212H03L1/00H03L5/00
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Quick Facts
Patent No.
US 10,541,647
App. No.
15/702,144
Granted
Jan 21, 2020
Kind
B2
Abstract

Transconductance (g m )-cell based circuitry is well suited for low power, low voltage complementary metal oxide silicon (CMOS) design in deep sub micro technology. This circuitry includes a g m cell as the basic building block. As such, it is desirable to have the transconductance of the g m cell to be constant against temperature and process corners. The present disclosure describes various g m -cell based circuitry having a controllable transconductance. Preferably, the controllable transconductance can be selectively controlled to be equal to the inverse of the value of an on-chip resistor. For example, the g m -cell based circuitry can sense the transconductance of an internal replica unit and can use negative feedback circuitry to cause this transconductance to be approximately equal a value of an on-chip resistor. However, in some situations, a value of this on-chip resistor is not accurately controlled. Therefore, the present disclosure also discloses a manner of calibrating the g m -cell based circuitry against an external resistor with a known accurate value.

Claims (43)

1. A transconductance (g m )-cell based low-drop out (LDO) regulator for regulating an input voltage to provide an output voltage, comprising:

voltage differential circuitry configured to provide a differential voltage based on the output voltage;

a g m -cell configured to amplify the differential voltage in accordance with a transconductance to provide an output current, wherein the transconductance is a ratio of the output current and the differential voltage;

current mirror circuitry configured to mirror current flowing through the voltage differential circuitry to provide a sensed current; and

amplifier circuitry configured to provide the output voltage which causes the output current to be approximately equal to the sensed current.

2. The g m -cell based LDO regulator of claim 1 , wherein the voltage differential circuitry comprises:

a variable resistor configured to convert the current flowing through the voltage differential circuitry to the differential voltage.

3. The g m -cell based LDO regulator of claim 2 , wherein the g m -cell based LDO regulator is fabricated onto a semiconductor substrate, and

wherein the variable resistor is situated within the semiconductor substrate.

4. The g m -cell based LDO regulator of claim 2 , wherein the voltage differential circuitry further comprises:

a p-type semiconductor device; and

an n-type semiconductor device,

wherein the variable resistor is coupled between the p-type semiconductor device and the n-type semiconductor device,

wherein the current flowing through the voltage differential circuitry flows through the p-type semiconductor device, the n-type semiconductor device, and the variable resistor.

5. The g m -cell based LDO regulator of claim 2 , wherein the transconductance is inversely related to a value of the variable resistor.

6. The g m -cell based LDO regulator of claim 1 , wherein the g m -cell comprises:

a p-type semiconductor device; and

an n-type semiconductor device,

wherein the p-type semiconductor device and the n-type semiconductor device are configured and arranged to form a logical inverting circuit.

7. The g m -cell based LDO regulator of claim 2 , wherein the voltage differential circuitry is further configured to adjust the differential voltage to cause the transconductance to be inversely proportional to a value of the variable resistor.

8. The g m -cell based LDO regulator of claim 7 , wherein the value of the variable resistor is controllable by a digital code.

9. The g m -cell based LDO regulator of claim 2 , wherein the voltage differential circuitry is further configured to derive the current flowing through the voltage differential circuitry from the output voltage to provide a differential voltage across the variable resistor.

10. A transconductance (g m )-cell based low-drop out (LDO) regulator for regulating an input voltage to provide an output voltage, comprising: voltage differential circuitry, having a variable resistor, configured to derive a first current flowing through the voltage differential circuitry from the output voltage to provide a differential voltage across the variable resistor; a g m -cell configured to amplify the differential voltage to provide an output current, the output current being related to a transconductance of the g m -cell, a value of the variable resistor, and the first current flowing through the voltage differential circuitry, wherein the voltage differential circuitry is further configured to adjust the differential voltage to cause the transconductance to be inversely proportional to the value of the variable resistor; current mirror circuitry configured to mirror the first current flowing through the voltage differential circuitry to provide a sensed current; and amplifier circuitry configured to provide the output voltage which causes the output current to be approximately equal to the sensed current.

11. The g m -cell based LDO regulator of claim 10 , wherein the voltage differential circuitry further comprises:

a p-type semiconductor device; and

an n-type semiconductor device,

wherein the variable resistor is coupled between the p-type semiconductor device and the n-type semiconductor device,

wherein the first current flowing through the voltage differential circuitry flows through the p-type semiconductor device, the n-type semiconductor device, and the variable resistor.

12. The g m -cell based LDO regulator of claim 10 , wherein the transconductance is inversely related to the value of the variable resistor.

13. The g m -cell based LDO regulator of claim 10 , wherein the value of the variable resistor is controllable by a digital code.

14. The g m -cell based LDO regulator of claim 10 , wherein the g m -cell comprises:

a p-type semiconductor device; and

an n-type semiconductor device,

wherein the p-type semiconductor device and the n-type semiconductor device are configured and arranged to form a logical inverting circuit, and

wherein a drain of the p-type semiconductor device is configured to receive the output voltage.

15. A method for operating a transconductance (g m )-cell based low-drop out (LDO) regulator for regulating an input voltage to provide an output voltage, the method comprising:

deriving a first current from the output voltage to provide a differential voltage across a variable resistor;

amplifying the differential voltage to provide an output current, the output current being related to a transconductance of a g m -cell, a value of the variable resistor, and the first current,

mirroring the first current to provide a sensed current; and

providing the output voltage which causes the output current to be approximately equal to the sensed current.

16. The method of claim 15 , wherein the first current flows through a p-type semiconductor device, an n-type semiconductor device, and the variable resistor.

17. The method of claim 15 , wherein the transconductance is inversely related to the value of the variable resistor.

18. The method of claim 15 , wherein the value of the variable resistor is controllable by a digital code.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER AND APPLICATION NOS. 13/237,550 AND 16/103,107 FROM THE MERGER PREVIOUSLY RECORDED ON REEL 047231 FRAME 0369. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048549/0113 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047231/0369 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2017
From: CHI, HOWARD; ANAND, SEEMA B.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 043587/0550 →
Continuity (2)
Provisional Application 62393554 · Sep 12, 2016
Related Publication 20180076767A1 · Mar 15, 2018