Semiconductor device, display apparatus, method of manufacturing semiconductor device and method of manufacturing display apparatus
A semiconductor device includes an insulating substrate, a polysilicon layer on the substrate, a first-gate-insulating layer on the polysilicon layer, a first metal layer and an oxide-semiconductor layer both on the first-gate-insulating layer, a second-gate-insulating layer on the oxide-semiconductor layer, a second metal layer on the second-gate-insulating layer, a first top gate planar thin film transistor in which the polysilicon layer forms a channel with a source, drain and gate, and a second top gate thin film transistor in which the oxide-semiconductor layer forms a channel with a source, drain and gate. The source and drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are in the second metal layer. The source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically interconnected.
1. A semiconductor device comprising:
an insulating substrate;
a polysilicon layer formed on the insulating substrate;
a first-gate-insulating layer formed on the polysilicon layer;
a first metal layer formed on the first-gate-insulating layer;
an oxide-semiconductor layer formed on the first-gate-insulating layer;
a second-gate-insulating layer formed on the oxide-semiconductor layer;
a second metal layer formed on the second-gate-insulating layer;
a first top gate planar thin film transistor in which the polysilicon layer serves as a channel and which includes a source, a drain and a gate; and
a second top gate thin film transistor in which the oxide-semiconductor layer serves as a channel and which includes a source, a drain and a gate, wherein
the source and the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are made of the second metal layer, and
the source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically connected to each other.
2. The semiconductor device according to claim 1 , wherein
a high-hydrogen-concentration region in which hydrogen concentration becomes local maximum is formed at an interface region of the first-gate-insulating layer and the oxide-semiconductor layer.
3. The semiconductor device according to claim 2 , wherein
hydrogen concentration in the high-hydrogen-concentration region is 10 times higher or more and 100 times lower than hydrogen concentration in an inner region of the first-gate-insulating layer or an inner region of the oxide-semiconductor layer.
4. The semiconductor device according to claim 2 , wherein
hydrogen concentration in the high-hydrogen-concentration region is equal to or higher than 1×10 21 cm −3 and lower than 1×10 22 cm −3 .
5. The semiconductor device according to claim 1 , wherein
the source and the drain of the second top gate thin film transistor are formed of the first metal layer.
6. The semiconductor device according to claim 1 , further comprising an insulating interlayer formed between the first-gate-insulating layer and the second-gate-insulating layer,
wherein the source and the drain of the second top gate thin film transistor is electrically connected to the channel of the second top gate thin film transistor through a contact hole formed in the insulating interlayer.
7. A display apparatus comprising:
the semiconductor device according to claim 1 ; and
a light emitting element, wherein
the second top gate thin film transistor supplies drive current to the light emitting element, and
the first top gate planar thin film transistor controls gate voltage of the second top gate thin film transistor.
8. The display apparatus according to claim 7 , comprising:
a data line for applying voltage to the source or drain of the first top gate planar thin film transistor; and
a power line for applying power voltage to the second top gate thin film transistor, wherein
the data line and the power line are formed of the second metal layer.
9. The display apparatus according to claim 8 , comprising a scan line for applying voltage to a gate of the first top gate planar thin film transistor, wherein
the scan line is formed of the first metal layer.
10. A semiconductor device comprising:
an insulating substrate;
a polysilicon layer formed on the insulating substrate;
a first-gate-insulating layer formed on the polysilicon layer;
a first metal layer formed on the first-gate-insulating layer;
an insulating interlayer formed on the first-gate-insulating layer;
an oxide-semiconductor layer formed on the insulating interlayer;
a second metal layer formed on the oxide-semiconductor layer;
a second-gate-insulating layer formed on the second metal layer;
a third metal layer formed on the second-gate-insulating layer;
a first top gate planar thin film transistor in which the polysilicon layer serves as a channel and which has a source, a drain and a gate; and
a second top gate thin film transistor in which the oxide-semiconductor layer serves as a channel and which has a source, a drain and a gate, wherein
the source and the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are made of the third metal layer, and
the source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically connected to each other.
11. The semiconductor device according to claim 10 , wherein
a high-hydrogen-concentration region in which hydrogen concentration becomes local maximum is formed at an interface region of the first-gate-insulating layer and the insulating interlayer.
12. The semiconductor device according to claim 11 , wherein
hydrogen concentration in the high-hydrogen-concentration region is 10 times higher or more and 100 times lower than hydrogen concentration in an inner region of the first-gate-insulating layer or an inner region of the insulating interlayer.
13. The semiconductor device according to claim 11 , wherein
hydrogen concentration in the high-hydrogen-concentration region is equal to or higher than 1×10 21 cm −3 and lower than 1×10 22 cm −3 .
14. The semiconductor device according to claim 10 , wherein
a high-hydrogen-concentration region in which hydrogen concentration becomes local maximum is formed at an interface region of the insulating interlayer and the oxide-semiconductor layer.
15. The semiconductor device according to claim 14 , wherein
hydrogen concentration in the high-hydrogen-concentration region is 10 times higher or more and 100 times lower than hydrogen concentration in an inner region of the insulating interlayer or an inner region of the oxide-semiconductor layer.
16. The semiconductor device according to claim 14 , wherein
hydrogen concentration in the high-hydrogen-concentration region is equal to or higher than 1×10 21 cm −3 and lower than 1×10 22 cm −3 .
17. A semiconductor device comprising:
an insulating substrate;
a polysilicon layer formed on the insulating substrate;
a first-gate-insulating layer formed on the polysilicon layer;
a first metal layer formed on the first-gate-insulating layer;
an insulating interlayer formed on the first-gate-insulating layer;
a second metal layer formed on the insulating interlayer;
an oxide-semiconductor layer formed on the second metal layer;
a second-gate-insulating layer formed on the oxide-semiconductor layer;
a third metal layer formed on the second-gate-insulating layer;
a first top gate planar thin film transistor in which the polysilicon layer serves as a channel and which has a source, a drain and a gate; and
a second top gate thin film transistor in which the oxide-semiconductor layer serves as a channel and which has a source, a drain and a gate, wherein
the source and the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are made of the third metal layer, and
the source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically connected to each other.
18. The semiconductor device according to claim 17 , wherein
a high-hydrogen-concentration region in which hydrogen concentration becomes local maximum is formed at an interface region of the first-gate-insulating layer and the insulating interlayer.
19. The semiconductor device according to claim 18 , wherein
hydrogen concentration in the high-hydrogen-concentration region is 10 times higher or more and 100 times lower than hydrogen concentration in an inner region of the first-gate-insulating layer or an inner region of the insulating interlayer.
20. The semiconductor device according to claim 18 , wherein
hydrogen concentration in the high-hydrogen-concentration region is equal to or higher than 1×10 21 cm −3 and lower than 1×10 22 cm 3 .
21. The semiconductor device according to claim 17 , wherein
a high-hydrogen-concentration region in which hydrogen concentration becomes local maximum is formed at an interface region of the insulating interlayer and the oxide-semiconductor layer.
22. The semiconductor device according to claim 21 , wherein
hydrogen concentration in the high-hydrogen-concentration region is 10 times higher or more and 100 times lower than hydrogen concentration in an inner region of the insulating interlayer or an inner region of the oxide-semiconductor layer.
23. The semiconductor device according to claim 21 , wherein
hydrogen concentration in the high-hydrogen-concentration region is equal to or higher than 1×10 21 cm −3 and lower than 1×10 22 cm 3 .