Semiconductor device
View Patent ↗In an ESD protection element configured to protect a semiconductor device, a first N-type low concentration diffusion layer is formed, as an offset layer for easing electric field concentration, under a LOCOS oxide film formed at each end of the gate electrode, and a second N-type low concentration diffusion layer and a third low concentration diffusion layer are formed under an N-type high concentration diffusion layer on the drain side to set the point of breakdown at a level deep inside a substrate from a surface of the substrate. The hold voltage is thus raised to a voltage equal to or higher than the operating voltage and a noise can be relieved without increasing the element size of the ESD protection element even when the noise having a large amount of positive electric charge is applied to a Vdd supply terminal.
1. A semiconductor device, comprising:
a P-type semiconductor substrate;
a gate insulating film on a surface of the P-type semiconductor substrate;
a gate electrode on the gate insulating film;
a LOCOS oxide film on the surface of the P-type semiconductor substrate at each end of the gate electrode;
a source region and a drain region each having a first N-type low concentration diffusion layer, the first N-type low concentration diffusion layers under the LOCOS oxide films;
the source region and the drain region each further having an N-type high concentration diffusion layer, the N-type high concentration diffusion layer of the source region in contact with the first N-type low concentration diffusion layer of the source region on a first opposite side from the gate insulating film, and the N-type high concentration diffusion layer of the drain region in contact with the first N-type low concentration diffusion layer of the drain region on a second opposite side from the gate insulating film;
a second N-type low concentration diffusion layer under and in contact with the first N-type low concentration diffusion layer of the drain region and the N-type high concentration diffusion layer of the drain region; and
a third N-type low concentration diffusion layer under and in contact with the second N-type low concentration diffusion layer.
2. A semiconductor device according to claim 1 , wherein the third N-type low concentration diffusion layer has a concentration higher than a concentration of the first N-type low concentration diffusion layer and higher than a concentration of the second N-type low concentration diffusion layer, and
wherein the concentration of the second N-type low concentration diffusion layer is equal to or higher than the concentration of the first N-type low concentration diffusion layer of the drain.
3. A semiconductor device according to claim 1 , wherein the third N-type low concentration diffusion layer is at a depth that is ¼ of a length in a horizontal direction of the first N-type low concentration diffusion layers.
4. A semiconductor device according to claim 2 , wherein the third N-type low concentration diffusion layer is at a depth that is ¼ of a length in a horizontal direction of the first N-type low concentration diffusion layers.