IP Library Granted Patent US 10,917,589
Granted Patent B2
US 10,917,589 · App. 15/719,345 · Granted Feb 9, 2021

Digital pixel with extended dynamic range

Inventor: Xinqiao Liu (Medina, WA)
Assignee: Facebook Technologies, LLC
H04N5/353G01J1/4228G01J1/44H01L27/1461H01L27/1464H01L27/1465H01L27/14636H04N5/3559H04N5/35527H04N5/378H04N5/379H04N5/37455G01J2001/446G01J2001/448
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Quick Facts
Patent No.
US 10,917,589
App. No.
15/719,345
Granted
Feb 9, 2021
Kind
B2
Abstract

Examples of a pixel cell are disclosed. In one example, a pixel cell may include a first semiconductor layer including a photodiode and one or more transistor devices configured to convert charges generated by the photodiode into an analog signal. The pixel cell may also include a second semiconductor layer including one or more transistor devices configured to convert the analog signal to one or more digital signals. The first semiconductor layer and the second semiconductor layer may form a stack structure. In another example, a pixel cell may include a photodiode and a capacitor. The pixel cell may be operated, in a first mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically coupled with the photodiode, and in a second mode of measurement, to measure the charges stored at the capacitor when the capacitor is electrically isolated from the photodiode.

Claims (40)

1. A pixel cell comprising:

a photodiode;

a capacitor configured to store, at least, a portion of charge generated by the photodiode in response to incident light as a first charge; and

a processing circuit configured to:

perform at least one of a first mode of measurement to generate a first output or a second mode of measurement to generate a second output; and

provide, based on an intensity range of the incident light, one of the first output or the second output to represent an intensity of the incident light,

wherein in the first mode of measurement, the processing circuit is configured to determine, when the capacitor is electrically coupled with the photodiode, a time when a quantity of the first charge stored at the capacitor exceeds a threshold to generate the first output; and

wherein in the second mode of measurement, the processing circuit is configured to measure the quantity of the first charge stored at the capacitor when the capacitor is electrically isolated from the photodiode to generate the second output.

2. The pixel cell of claim 1 , wherein the processing circuit comprises a comparator; and

wherein the processing circuit is coupled with a variable threshold generator and a counter.

3. The pixel cell of claim 2 , wherein, in the first mode of measurement:

the variable threshold generator is configured to generate a fixed threshold voltage;

the comparator is configured to compare the fixed threshold voltage against a voltage representing the quantity of the first charge stored at the capacitor to generate a decision output;

the counter is configured to generate a set of count values; and

a first count value of the set of count values generated by the counter when the decision output indicates that the voltage intersects with the fixed threshold voltage measures the time when the quantity of the first charge stored at the capacitor exceeds the threshold; and

the first count value is generated as the first output.

4. The pixel cell of claim 3 , wherein the first count value decreases when the intensity of incident light increases.

5. The pixel cell of claim 3 , wherein the fixed threshold voltage corresponds to a saturation light intensity for the capacitor.

6. The pixel cell of claim 2 , wherein, in the second mode of measurement:

the variable threshold generator is configured to generate a ramping voltage;

the comparator is configured to compare the ramping voltage against a voltage representing a quantity of the first charge stored at the capacitor to generate a decision output;

the counter is configured to generate a set of count values and a second count value of the set of count values generated by the counter when the decision output indicates that the voltage intersects with the ramping voltage measures the quantity of the first charge stored at the capacitor; and

the second count value is generated as the second output.

7. The pixel cell of claim 6 , wherein the second count value increases when the intensity of incident light increases.

8. The pixel cell of claim 1 , wherein the processing circuit is configured to skip the second mode of measurement based on a determination, from the first mode of measurement, that the quantity of the first charge stored at the capacitor when the photodiode is electrically coupled with the photodiode exceeds the threshold.

9. The pixel cell of claim 1 , wherein the processing circuit is configured to:

start an exposure period in which the capacitor receives and stores the at least a portion of the charge generated by the photodiode as the first charge;

during the exposure period, perform the first mode of measurement to determine whether a quantity of the first charge reaches the threshold and, if the quantity of the first charge reaches the threshold, determine the time when the quantity of the first charge stored at the capacitor reaches the threshold as the first output;

after the exposure period ends:

electrically isolate the capacitor from the photodiode; and

perform the second mode of measurement to measure the quantity of the first charge stored at the capacitor when the exposure period ends as the second output.

10. The pixel cell of claim 9 , wherein the processing circuit is configured to:

output the one of the first output or the second output based on whether the quantity of the first charge stored at the capacitor reaches the threshold during the exposure period.

11. The pixel cell of claim 1 , wherein the photodiode and the capacitor is included in a first semiconductor substrate; and

wherein the processing circuit is included in a second semiconductor substrate; and

wherein the first semiconductor substrate and the second semiconductor substrate form a stack structure.

12. The pixel cell of claim 11 , wherein the capacitor is formed as a floating drain region in the first semiconductor substrate; and

wherein the pixel cell further comprises a straight interconnect that connects between the floating drain region and the processing circuit, the straight interconnect traversing the first semiconductor substrate and the second semiconductor substrate.

13. The pixel cell of claim 6 , wherein, in the second mode of measurement:

the variable threshold generator is configured to generate the ramping voltage based on the set of count values generated by the counter.

Assignments (3)
CHANGE OF NAME Recorded Jul 27, 2022
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 060990/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2019
From: FACEBOOK, INC.
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 049923/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2017
From: LIU, XINQIAO
To: FACEBOOK, INC.
Reel/Frame 043945/0245 →
Continuity (2)
Provisional Application 62525045 · Jun 26, 2017
Related Publication 20180376082A1 · Dec 27, 2018