IP Library Granted Patent US 10,125,420
Granted Patent B2
US 10,125,420 · App. 15/728,412 · Granted Nov 13, 2018

Method of making multi-electrode molecular sensing devices

Inventors: Sungho Jin (San Diego, CA); Barry L. Merriman (San Diego, CA); Tim Geiser (Petaluma, CA); Chulmin Choi (San Diego, CA); Paul Mola (San Diego, CA)
Assignee: Roswell Biotechnologies, Inc.
C23C16/01G01N27/4145
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Quick Facts
Patent No.
US 10,125,420
App. No.
15/728,412
Granted
Nov 13, 2018
Kind
B2
Abstract

A molecular sensor includes a substrate defining a substrate plane, and a plurality of pairs of electrode sheets above or below the substrate at an angle to the substrate plane. The molecular sensor further includes a plurality of inner dielectric sheets between each electrode sheet in each pair of electrode sheets of the plurality of pairs, and an outer dielectric sheet between each pair of electrode sheets of the plurality of pairs.

Claims (18)

1. A method of manufacturing a structure usable in a molecular sensor device, the method comprising:

forming a stack comprising:

providing a first outer dielectric layer;

depositing a first electrode layer on the first outer dielectric layer;

depositing an inner dielectric layer having a first thickness on the first electrode layer;

depositing a second electrode layer on the inner dielectric layer; and

depositing a second outer dielectric layer having a second thickness on the second electrode layer, wherein the second thickness of the second outer dielectric layer is at least one order of magnitude greater than the first thickness of the inner dielectric layer;

slicing through the stack at least once at an angle to the layers in the stack to form a plurality of chips from the sliced portions of the stack;

attaching the plurality of chips to a substrate so that the sliced portions of the first electrode layer and the second electrode layer form a plurality of pairs of electrode sheets at an angle to a substrate plane defined by the substrate, and so that the sliced portions of the inner dielectric layer forms a plurality of inner dielectric sheets with each inner dielectric sheet between each electrode sheet in each pair of electrode sheets; and

forming a groove located on an exposed end portion of each inner dielectric sheet.

2. The method of claim 1 , wherein forming the stack further includes repeating the deposition of the first electrode layer, the inner dielectric layer, the second electrode layer, and the second outer dielectric layer at least once so that each chip of the plurality of chips includes multiple pairs of electrode sheets.

3. The method of claim 1 , further comprising depositing a dielectric cover layer at an angle or perpendicular to the plurality of pairs of electrode sheets opposite the substrate to define a gap exposing a portion of the plurality of pairs of electrode sheets.

4. The method of claim 1 , further comprising roughening an exposed edge of each electrode sheet.

5. The method of claim 1 , further comprising depositing a gate electrode parallel to the substrate plane and perpendicular to an electrode plane defined by an electrode sheet in the plurality of pairs of electrode sheets.

6. The method of claim 1 , further comprising forming a plurality of channels, each channel arranged to introduce a fluid to exposed portions of at least two pairs of electrode sheets of the plurality of pairs of electrode sheets.

7. The method of claim 1 , wherein the groove is formed by etching the inner dielectric sheet using an etching process selecting from the group consisting of RIE, sputter etch, and a chemical etch.

8. The method of claim 1 , wherein each of the inner dielectric sheets is no more than 50 nm thick.

9. The method of claim 1 , further comprising connecting a plurality of lead conductors to the plurality of pairs of electrode sheets with each lead conductor connected to a respective electrode sheet.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 6, 2023
From: PROCOPIO, CORY, HARGREAVES & SAVITCH LLP
To: ROSWELL ME INC.
Reel/Frame 065474/0214 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2023
From: ROSWELL BIOTECHNOLOGIES, INC.
To: ROSWELL ME INC.
Reel/Frame 064073/0448 →
SECURITY INTEREST Recorded May 10, 2023
From: ROSWELL BIOTECHNOLOGIES, INC.
To: PROCOPIO, CORY, HARGREAVES & SAVITCH LLP
Reel/Frame 063601/0105 →
SECURITY INTEREST Recorded Nov 4, 2021
From: ROSWELL BIOTECHNOLOGIES, INC.
To: WESTERN ALLIANCE BANK, AN ARIZONA CORPORATION
Reel/Frame 058025/0921 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2018
From: JIN, SUNGHO; MERRIMAN, BARRY L.; GEISER, TIM; CHOI, CHULMIN; MOLA, PAUL W.
To: ROSWELL BIOTECHNOLOGIES, INC.
Reel/Frame 046255/0227 →
Continuity (2)
Division 15220307 · Jul 26, 2016
Related Publication 20180031509A1 · Feb 1, 2018
Cited By (3)
US 12,247,251 US 12,504,396 US 12,607,593