IP Library Granted Patent US 10,432,527
Granted Patent B1
US 10,432,527 · App. 15/729,555 · Granted Oct 1, 2019

Packet header field extraction

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Quick Facts
Patent No.
US 10,432,527
App. No.
15/729,555
Granted
Oct 1, 2019
Kind
B1
Abstract

Some embodiments provide a method for processing a packet for a pipeline of a hardware switch. The pipeline, in some embodiments, includes several different stages that match against packet header fields and modify packet header fields. The method receives a packet that includes a set of packet headers. The method then populates, for each packet header in the set of packet headers, (i) a first set of registers with packet header field values of the packet header that are used in the pipeline, and (ii) a second set of registers with packet header field values of the packet header that are not used in the pipeline.

Claims (32)

1. For a parser of a packet processing pipeline that comprises the parser, a set of match-action stages, and a deparser, a method comprising:

receiving a packet comprising a plurality of packet header fields;

for each of the packet header fields, determining whether the packet header field is used by the set of match-action stages;

storing values of the packet header fields used by the set of match-action stages in a first set of data containers that are provided to the set of match-action stages; and

storing values of the packet header field that are not used by the set of match-action stages in a second set of data containers that are provided directly to the deparser, bypassing the set of match-action stages.

2. The method of claim 1 , wherein the packet processing pipeline is one of a plurality of pipelines of a hardware forwarding element.

3. The method of claim 1 , wherein each of the match-action stages comprises (i) a set of match tables comprising match entries against which the values of the packet header fields are matched and (ii) a set of action entries to perform when corresponding match entries are matched by the values of the packet header fields.

4. The method of claim 3 , wherein a packet header field is used by the set of match-action stages when the value of the packet header field is matched against at least one match entry in any of the match-action stages.

5. The method of claim 3 , wherein a packet header field is used by the set of match-action stages when at least one action entry in any of the match-action stages specifies a modification to the value of the packet header field.

6. The method of claim 1 further comprising sending a payload of the packet directly to the deparser.

7. The method of claim 6 , wherein the set of match-action stages modifies the values stored in the first set of data containers and provides these modified values to the deparser.

8. The method of claim 7 , wherein the deparser reassembles the packet using the modified values stored in the first set of data containers, the values stored in the second set of data containers, and the payload.

9. The method of claim 1 , wherein the packet header fields are grouped into sets of packet header fields for different protocols.

10. The method of claim 1 , wherein the value of a first packet header field of the packet is stored in the first set of data containers, the value of a second packet header field of the packet is stored in the second set of data containers, and the value of a third packet header field of the packet is stored in the first set of data containers.

11. The method of claim 10 , wherein the second packet header field is ordered between the first and third packet header fields in the packet.

12. The method of claim 11 , wherein the value of a fourth packet header field is stored in the second set of data containers, wherein the third packet header field is ordered between the second and fourth packet header fields in the packet.

13. A hardware switch comprising a set of packet processing pipelines, at least one of the packet processing pipelines comprising:

a parser;

a set of match-action stages; and

a deparser,

wherein the the parser is configured to:

receive a packet comprising a plurality of packet header fields;

determine, for each of the packet header fields, whether the packet header field is used by the set of match-action stages;

store values of the packet header fields used by the set of match-action stages in a first set of data containers and provide the first set of data containers to the set of match-action stages; and

store values of the packet header field that are not used by the set of match-action stages in a second set of data containers and provide the second set of data containers directly to the deparser, bypassing the set of match-action stages.

14. The hardware switch of claim 13 , wherein each of the match-action stages comprises (i) a set of match tables comprising match entries against which the values of the packet header fields are matched and (ii) a set of action entries to perform when corresponding match entries are matched by the values of the packet header fields.

15. The hardware switch of claim 14 , wherein a packet header field is used by the set of match-action stages when the value of the packet header field is matched against at least one match entry in any of the match-action stages.

16. The hardware switch of claim 14 , wherein a packet header field is used by the set of match-action stages when at least one action entry in any of the match-action stages specifies a modification to the value of the packet header field.

17. The hardware switch of claim 13 , wherein the parser is further configured to send a payload of the packet directly to the deparser.

18. The hardware switch of claim 17 , wherein the set of match-action stages is configured to modify the values stored in the first set of data containers and provide these modified values to the deparser.

19. The hardware switch of claim 18 , wherein the deparser is configured to reassemble the packet using the modified values stored in the first set of data containers, the values stored in the second set of data containers, and the payload.

20. The hardware switch of claim 13 , wherein the value of a first packet header field of the packet is stored in the first set of data containers, the value of a second packet header field of the packet is stored in the second set of data containers, and the value of a third packet header field of the packet is stored in the first set of data containers, wherein the second packet header field is ordered between the first and third packet header fields in the packet.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Sep 20, 2019
From: SILICON VALLEY BANK
To: BAREFOOT NETWORKS, INC.
Reel/Frame 050455/0455 →
RELEASE OF SECURITY INTEREST Recorded Sep 20, 2019
From: SILICON VALLEY BANK
To: BAREFOOT NETWORKS, INC.
Reel/Frame 050455/0497 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 25, 2019
From: BAREFOOT NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 049588/0001 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 25, 2019
From: BAREFOOT NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 049588/0112 →
Cited By (1)
US 12,634,199