Method for producing an optoelectronic semiconductor chip and optoelectronic semiconductor chip

1. A method for producing an optoelectronic semiconductor chip, comprising the steps:

a) Providing a semiconductor layer sequence including a first semiconductor layer and a second semiconductor layer, as well as a first contact layer, which extends laterally along the first semiconductor layer and electrically contacts the same;

b) Applying a third semiconductor layer on a side of the first contact layer facing away from the semiconductor layer sequence;

c) Forming a recess, which extends through the third semiconductor layer, the first contact layer and the first semiconductor layer and into the second semiconductor layer;

d) Applying a passivation layer on a side of the third semiconductor layer facing away from the semiconductor layer sequence;

e) Forming at least a first through-opening and at least a second through-opening in the passivation layer; and

f) Applying a second contact layer, wherein the second contact layer electrically contacts the second semiconductor layer in the region of the at least one first through-opening, and electrically contacts the third semiconductor layer in the region of the at least one second through-opening.

2. The method according to claim 1 , in which

additionally, a part of the passivation layer is applied on to a side of the first contact layer facing away from the semiconductor layer sequence; and

at least one further through-opening is formed in the passivation layer, so that the first contact layer electrically contacts the third semiconductor layer in the region of the at least one further through-opening.

3. The method according to claim 1 , in which

the through-openings are formed by means of a chemical process.

4. The method according to claim 1 , in which

the through-openings are formed in a common method step.

5. The method according to claim 1 , in which

the third semiconductor layer comprises hydrogenated amorphous silicon, a-Si:H, and/or amorphous indium gallium zinc oxide, a-InGaZnO, or consists of at least one of these materials.

6. The method according to claim 1 , in which

the third semiconductor layer laterally surrounds at least one first through-opening in an annular manner, and/or

the third semiconductor layer is laterally formed in the type of a circular segment and borders at least one first through-opening and/or

the third semiconductor layer is formed laterally in the form of at least one sign and/or at least one character.

7. A method for producing an optoelectronic semiconductor chip, comprising the steps:

a) Providing a semiconductor layer sequence including a first semiconductor layer and a second semiconductor layer, as well as a first contact layer, which extends laterally along the first semiconductor layer and electrically contacts the same;

b) Forming a recess, which extends through the first contact layer and the first semiconductor layer and into the second semiconductor layer;

c) Applying a passivation layer on a side of the first contact layer facing away from the semiconductor layer sequence;

d) Forming at least one first through-opening and at least one second through-opening in the passivation layer;

e) Forming a third semiconductor layer on a side of the first contact layer facing away from the semiconductor layer sequence; and

f) Applying a second contact layer, wherein the second contact layer electrically contacts the second semiconductor layer in the region of the least one first through-opening, and electrically contacts the third semiconductor layer in the region of the at least one second through-opening.

8. The method according to claim 7 , in which

the through-openings are formed by means of a chemical process.

9. The method according to claim 7 , in which

the through-openings are formed in a common method step.

10. The method according to claim 7 , in which

the third semiconductor layer comprises hydrogenated amorphous silicon, a-Si:H, and/or amorphous indium gallium zinc oxide, a-InGaZnO, or consists of at least one of these materials.

11. The method according to claim 7 , in which

the third semiconductor layer laterally surrounds at least one first through-opening in an annular manner, and/or

the third semiconductor layer is laterally formed in the type of a circular segment and borders at least one first through-opening and/or

the third semiconductor layer is formed laterally in the form of at least one sign and/or at least one character.

12. An optoelectronic semiconductor chip, including

a semiconductor layer sequence, including a first semiconductor layer and a second semiconductor layer,

a first contact layer for electrically contacting the first semiconductor layer wherein the first contact layer extends laterally along the first semiconductor layer,

wherein the optoelectronic semiconductor chip either includes

a third semiconductor layer on a side of the first contact layer that faces away from the semiconductor layer sequence,

a recess, which extends through the third semiconductor layer, the first contact layer and the first semiconductor layer and into the second semiconductor layer, and

a passivation layer on a side of the third semiconductor layer facing away from the semiconductor layer sequence,

or the optoelectronic semiconductor chip includes

a recess, which extends through the first contact layer and the first semiconductor layer and into the second semiconductor layer,

a passivation layer on a side of the first contact layer facing away from the semiconductor layer sequence, and

a third semiconductor layer on a side of the first contact layer facing away from the semiconductor layer sequence,

wherein the optoelectronic semiconductor chip further includes

a second contact layer on a side of the passivation layer facing away from the semiconductor layer sequence, wherein

the passivation layer comprises at least a first through-opening as well as at least a second through-opening,

the second contact layer electrically contacts the second semiconductor layer in the region of the at least one first through-opening and electrically contacts the third semiconductor layer in the region of the at least one second through-opening.

13. The optoelectronic semiconductor chip according to claim 12 , in which

additionally, a part of the passivation layer is arranged between the first contact layer and the third semiconductor layer; and

the passivation layer comprises at least one further through-opening so that the first contact layer electrically contacts the third semiconductor layer in the region of the at least one further through-opening.

14. The optoelectronic semiconductor chip according to claim 12 , in which

the second contact layer extends through the at least one first through-opening from a side of the semiconductor layer sequence facing the first contact layer.

15. The optoelectronic semiconductor chip according to claim 12 , in which

the third semiconductor layer forms a Schottky diode together with the first contact layer, and/or

the third semiconductor layer forms a Schottky diode together with the second contact layer.

16. The optoelectronic semiconductor chip according to claim 12 , in which the semiconductor layer sequence contains one of the following material systems:

Al x In y Ga 1-x-y N, Al x In y Ga 1-x-y P, Al x In y Ga 1-x-y As, with in each case 0≤x≤1, 0≤y≤1, and x+y≤1.

17. The optoelectronic semiconductor chip according to claim 12 , in which

the third semiconductor layer comprises hydrogenated amorphous silicon, a-Si:H, and/or amorphous indium gallium zinc oxide, a-InGaZnO, or consists of at least one of these materials.

18. The optoelectronic semiconductor chip according to claim 12 , in which

the third semiconductor layer laterally surrounds at least one first through-opening in an annular manner, and/or

the third semiconductor layer laterally borders at least one first through-opening in the type of a circular segment and/or

the third semiconductor layer borders at least one first through-opening laterally in a rectilinear manner, and/or

the third semiconductor layer is formed laterally in the form of at least one sign and/or at least one character.

19. The optoelectronic semiconductor chip according to claim 12 , in which

the third semiconductor layer is arranged laterally between at least two first through-openings, and/or

the third semiconductor layer extends laterally along an edge region of the semiconductor chip.

20. The optoelectronic semiconductor chip according to claim 12 , in which

the third semiconductor layer laterally surrounds at least one first through-opening in an annular manner, and/or

the third semiconductor layer is laterally formed in the type of a circular segment and borders at least one first through-opening and/or

the third semiconductor layer is formed laterally in the form of at least one sign and/or at least one character.