Electronic unit with a secure element and method carried out in such an electronic unit facilitating communication with the secure element
An electronic unit includes a communication interface, a processor, a secure element, and a sub-system. The processor is connected to the communication interface by a first bus, to the secure element by a second bus and to the sub-system. The processor is designed to operate in a first mode, in which, at the second bus, it reproduces the signals received from the communication interface at the first bus. Also disclosed is a method carried out in such an electronic unit.
1. An electronic unit, comprising:
a communication interface;
a processor;
a secure element; and
a sub-system,
the processor being connected to the communication interface, by means of a first bus, to the secure element by means of a second bus and to the sub-system,
wherein the processor operates, in a first mode, to reproduce, on the second bus, signals received by the processor from the communication interface on the first bus, and
wherein the processor also operates, in the first mode, to reproduce, on the first bus, signals received by the processor from the secure element on the second bus.
2. The electronic unit as claimed in claim 1 , wherein the processor, in addition to the first mode, is also configured to operate in a second mode, alternate from the first mode, where the processor in the second mode generates on the second bus signals determined as a function of information received from the sub-system.
3. The electronic unit as claimed in claim 1 , wherein the processor is configured to transmit in an anticipated manner on the first bus, in response to said signals received from the communication interface, expected signals coming from the secure element on the second bus.
4. The electronic unit as claimed in claim 1 , wherein the sub-system is a man machine interface or a communication module.
5. The electronic unit as claimed in claim 2 , wherein the processor transmits, in the second mode, data to the sub-system.
6. The electronic unit as claimed in claim 2 , wherein the processor transmits, in the second mode, wait signals on the first bus to the communication interface.
7. The electronic unit as claimed in claim 2 , wherein the processor analyzes the data transmitted on the first bus, and switches from the first mode to the second mode when specific data are transmitted on the first bus and analyzed by the processor.
8. The electronic unit as claimed in claim 2 , wherein the processor switches from the second mode to the first mode when the processing of data obtained by use of the sub-system is completed within the secure element.
9. An electronic unit, comprising:
a communication interface;
a processor;
a secure element; and
a sub-system,
the processor being connected to the communication interface, by means of a first bus, to the secure element by means of a second bus and to the sub-system,
wherein the processor operates, in a first mode, to reproduce, on the second bus, signals received from the communication interface on the first bus,
wherein the processor, in addition to the first mode, is also configured to operate in a second mode, alternate from the first mode, where the processor in the second mode generates on the second bus signals determined as a function of information received from the sub-system, and
wherein the processor switches from the first mode to the second mode upon reception of specific data on the second bus coming from the secure element.
10. A method carried out by an electronic unit that has a communication interface, a processor, a secure element, and a sub-system, the processor being connected to the communication interface, by means of a first bus, to the secure element by means of a second bus and to the sub-system, the method comprising:
detecting, by the processor, first signals received by the processor from the communication interface on the first bus;
reproducing, by the processor operating in a first mode, said first signals on the second bus; and
reproducing, on the first bus by the processor operating in the first mode, signals received by the processor from the secure element on the second bus.
11. The method as claimed in claim 10 , further comprising:
receiving, by the processor, information coming from the sub-system ( 8 ); and
generating, on the second bus by the processor operating in a second mode, signals determined as a function of the information received.
12. The method as claimed in claim 10 , further comprising:
transmitting, by the processor, in an anticipated manner on the first bus, in response to said signals received from the communication interface, expected signals coming from the secure element on the second bus.
13. The method as claimed in claim 10 , further comprising:
transmitting, by the processor operating in the second mode, data to the sub-system.
14. The method as claimed in claim 10 , further comprising:
transmitting, by the processor operating in the second mode, wait signals on the first bus to the communication interface.
15. The method as claimed in claim 10 , further comprising:
switching, by the processor, from the first mode to the second mode upon reception of specific data on the second bus coming from the secure element.
16. The method as claimed in claim 10 , further comprising:
analyzing, by the processor, the data transmitted on the first bus and of switching, by the processor, from the first mode to the second mode when specific data are transmitted on the first bus and analyzed by the processor.
17. The method as claimed in claim 15 , further comprising:
switching, by the processor, from the second mode to the first mode when the processing of data obtained by use of the sub-system is completed within the secure element.
18. The method as claimed in claim 10 , wherein the sub-system is a man machine interface or a communication module.