Voltage abnormality detection circuit and semiconductor device
In order to provide a voltage abnormality detection circuit and a semiconductor device which are capable of detecting a voltage abnormality in an internal power supply voltage of the semiconductor device with a simple circuit configuration, the voltage abnormality detection circuit includes: a reference voltage circuit configured to output a first reference voltage, which is higher than the internal power supply voltage, and a second reference voltage, which is lower than the internal power supply voltage; a first voltage detection circuit configured to detect that the internal power supply voltage has exceeded a desired voltage value, with the use of the first reference voltage; and a second voltage detection circuit configured to detect that the internal power supply voltage has dropped lower than the desired voltage value, with the use of the second reference voltage.
1. A voltage abnormality detection circuit configured to detect a voltage abnormality in an internal power supply voltage which is supplied by a voltage regulator to an internal circuit, the voltage abnormality detection circuit comprising:
a reference voltage circuit configured to output a first reference voltage which is higher than the internal power supply voltage, and a second reference voltage which is lower than the internal power supply voltage;
a first voltage detection circuit to which the first reference voltage is input, and which is configured to detect that the internal power supply voltage is higher than a first voltage value; and
a second voltage detection circuit to which the second reference voltage is input, and which is configured to detect that the internal power supply voltage is lower than a second voltage value,
wherein the first voltage detection circuit comprises:
a first NMOS transistor in which the first reference voltage is input to a gate, and the internal power supply voltage is input to a source and a bulk; and
a first constant current source connected between a drain of the first NMOS transistor and a power supply terminal,
wherein the first voltage detection circuit is configured to detect that the internal power supply voltage is higher than the first voltage value when the first NMOS transistor is turned off,
wherein the second voltage detection circuit comprises:
a second NMOS transistor in which the second reference voltage is input to a gate, and the internal power supply voltage is input to a source and a bulk; and
a second constant current source connected between a drain of the second NMOS transistor and a power supply terminal, and
wherein the second voltage detection circuit is configured to detect that the internal power supply voltage is lower than the second voltage value when the second NMOS transistor is turned on.
2. The voltage abnormality detection circuit according to claim 1 , further comprising a switch circuit sandwiched by the reference voltage circuit and by the first voltage detection circuit and the second voltage detection circuit,
wherein an operation of the voltage abnormality detection circuit is tested by controlling the switch circuit so that the second reference voltage is input to the first voltage detection circuit whereas the first reference voltage is input to the second voltage detection circuit.
3. A semiconductor device, comprising:
a voltage regulator configured to supply an internal power supply voltage to an internal circuit; and
the voltage abnormality detection circuit of claim 1 to which the internal power supply voltage is input and which is configured to detect a voltage abnormality in the internal power supply voltage.
4. A semiconductor device, comprising:
a voltage regulator configured to supply an internal power supply voltage to an internal circuit; and
the voltage abnormality detection circuit of claim 2 to which the internal power supply voltage is input and which is configured to detect a voltage abnormality in the internal power supply voltage.